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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-15 13:51:22 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-15 16:57:57 +0200 |
commit | df6eb79a2209bdfd30df699886dcaff7b43f4e1e (patch) | |
tree | b96502b30bb9dd19a730a4b6d6ed6721e252a331 /src/northbridge/intel | |
parent | 32a38ee85b96f71c74996ec4550169196c64d3ab (diff) | |
download | coreboot-df6eb79a2209bdfd30df699886dcaff7b43f4e1e.tar.xz |
intel/x4x: Do not use scratchpad register for ACPI S3
If S3 support was implemented for this platform later on, use
romstage handoff structure instead.
Change-Id: I03c1e07a7fcc17c27203d0c4e32e3958f2ba5273
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15716
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/x4x/northbridge.c | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 2d6c39f365..15e150e242 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -162,22 +162,6 @@ static void enable_dev(device_t dev) /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { dev->ops = &pci_domain_ops; -#if CONFIG_HAVE_ACPI_RESUME - switch (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), /*D0F0_SKPD*/0xdc)) { - case SKPAD_NORMAL_BOOT_MAGIC: - printk(BIOS_DEBUG, "Normal boot.\n"); - acpi_slp_type=0; - break; - case SKPAD_ACPI_S3_MAGIC: - printk(BIOS_DEBUG, "S3 Resume.\n"); - acpi_slp_type=3; - break; - default: - printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); - acpi_slp_type=0; - break; - } -#endif } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { dev->ops = &cpu_bus_ops; } |