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authorArthur Heymans <arthur@aheymans.xyz>2019-01-11 16:40:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 12:00:33 +0000
commitb31aee9973d1dcf9d1d7840a012c2b70367c4680 (patch)
treea2d777efb3129ad4fbe8b2bfdcc3568b6d9ebebd /src/northbridge/intel
parent8cf6d4d7d68e13577b498a0518d2511e5fff0f59 (diff)
downloadcoreboot-b31aee9973d1dcf9d1d7840a012c2b70367c4680.tar.xz
nb/intel/{i945,pineview}: Remove unused function
Change-Id: I6ca83bde61f231b9f79c90af1d6c1cfa1a027768 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/i945/i945.h3
-rw-r--r--src/northbridge/intel/pineview/pineview.h3
2 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 757eb52617..0db07e1caf 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -371,9 +371,6 @@ int i945_silicon_revision(void);
void i945_early_initialization(void);
void i945_late_initialization(int s3resume);
-/* provided by mainboard code */
-void setup_ich7_gpios(void);
-
/* debugging functions */
void print_pci_devices(void);
void dump_pci_device(unsigned int dev);
diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h
index 9873d4de81..8c32e17113 100644
--- a/src/northbridge/intel/pineview/pineview.h
+++ b/src/northbridge/intel/pineview/pineview.h
@@ -235,9 +235,6 @@ u32 decode_igd_memory_size(const u32 gms);
u32 decode_igd_gtt_size(const u32 gsm);
u8 decode_pciebar(u32 *const base, u32 *const len);
-/* provided by mainboard code */
-void setup_ich7_gpios(void);
-
struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp);