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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-03-24 17:01:41 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-04-23 10:06:01 +0000
commitda9302a2c42038594ed0127b8887c7d984cd65e1 (patch)
treee6dee07cdc5ccf60da66ffaa86e855c961c8fd25 /src/northbridge/intel
parent78fbe3d8319bc8fdf82b76378d29c6c902fd13e5 (diff)
downloadcoreboot-da9302a2c42038594ed0127b8887c7d984cd65e1.tar.xz
nb/intel/sandybridge: Drop pch.h from sandybridge.h
Include pch.h in the source files instead in sandybridge.h. Tested on Lenovo T520 (Intel Sandy Bridge). Still boots to OS, no errors visible in dmesg. Change-Id: I9e5b678e979a8d136d8d00b49486d0a882f77d81 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32065 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/sandybridge/gma.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h2
3 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 0d28d67602..cb6782e9b7 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -25,6 +25,7 @@
#include <drivers/intel/gma/libgfxinit.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <drivers/intel/gma/opregion.h>
+#include <southbridge/intel/bd82x6x/pch.h>
#include <cbmem.h>
#include "chip.h"
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index c066634312..050f4c2ba0 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -29,6 +29,7 @@
#include <mrc_cache.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/smbus.h>
+#include <southbridge/intel/bd82x6x/pch.h>
#include <cpu/x86/msr.h>
#include "raminit_native.h"
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index e315fa463f..92cb888a41 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -52,8 +52,6 @@
#define IOMMU_BASE1 0xfed90000ULL
#define IOMMU_BASE2 0xfed91000ULL
-#include <southbridge/intel/bd82x6x/pch.h>
-
/* Everything below this line is ignored in the DSDT */
#ifndef __ACPI__
#include <cpu/intel/model_206ax/model_206ax.h>