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| author | Matthias Gazzari <mail@qtux.eu> | 2018-05-19 00:44:20 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-05-21 13:25:24 +0000 |
| commit | dfa51259ad1434aa75bef6d071ba5dfacbf13cba (patch) | |
| tree | bd264bc9ebd80f77c5ab2be2b61d1ee36efa2d3f /src/northbridge/intel | |
| parent | 67403ed6e43a0c0f5b2911f68c0f8161d24575b6 (diff) | |
| download | coreboot-dfa51259ad1434aa75bef6d071ba5dfacbf13cba.tar.xz | |
nb/intel/nehalem: Fix smashed stack in romstage
Stack smashing was detected during raminit when not loading from MRC.
Adding CAR_GLOBAL to a struct inside raminit was suggested in
https://mail.coreboot.org/pipermail/coreboot/2018-May/086677.html in
order to fix the problem.
Adding CAR_GLOBAL to the ram timings variable solves the issue (adding
it to the ram_training or raminfo struct had no effect).
This is just a workaround and might need a proper fix in the future.
Tested on Lenovo X201i with 2+2 and 4+4 GB RAM.
Change-Id: I21b380db61be2aedc045201821d83e18e7d07ad1
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/nehalem/raminit.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index df88ef3e79..6a27b576e0 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -44,6 +44,7 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <mrc_cache.h> +#include <arch/early_variables.h> #endif #if !REAL @@ -282,6 +283,9 @@ struct raminfo { const struct ram_training *cached_training; }; +/* Global allocation of timings_car */ +timing_bounds_t timings_car[64] CAR_GLOBAL; + static void write_500(struct raminfo *info, int channel, u32 val, u16 addr, int bits, int flag); @@ -3128,7 +3132,7 @@ static void do_ram_training(struct raminfo *info) u8 reg_178; int niter; - timing_bounds_t timings[64]; + timing_bounds_t *timings = timings_car; int lane, rank, slot, channel; u8 reg178_center; |