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| author | Aaron Durbin <adurbin@chromium.org> | 2015-08-07 23:00:22 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-14 15:20:57 +0200 |
| commit | 71e0ac858e84fc3882fd1f836b95e56df9c933f4 (patch) | |
| tree | 516d83f0982fd30e35ed5fd3f61e69552abc9cb8 /src/northbridge/intel | |
| parent | f50b25d7e2c979e2b8cddb76039afcdeb686e1c0 (diff) | |
| download | coreboot-71e0ac858e84fc3882fd1f836b95e56df9c933f4.tar.xz | |
skylake: provide clarification for FADT gpe0_blk_len
Instead of using a hard-coded value leverage the existing
definitions to perform GPE0 block length calculations. There
are 4 pairs of 32-bit status/enable registers.
BUG=chrome-os-partner:43522
BRANCH=None
TEST=Built and booted glados.
Original-Change-Id: I14d08298b5750c91ce0ac3fa33569813396f7089
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291932
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: I127f026f15180fa79625d4cad96d5e35f85e5090
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11205
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions