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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-04-28 17:57:47 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-04-29 11:57:45 +0000 |
| commit | c056729bfdc30eab6ae3729c7ce2a6d58be16604 (patch) | |
| tree | adf723d2a8bb3cc8b2a605a8a340b655bf9eb5ae /src/northbridge/intel | |
| parent | bac27d5ebbc9114df2e6e43e45bfe3f2b6613e06 (diff) | |
| download | coreboot-c056729bfdc30eab6ae3729c7ce2a6d58be16604.tar.xz | |
nb/intel/sandybridge: Use system_reset()
Use already defined system_reset() function.
Change-Id: Ic4716a3bb1dc6c6b29a028fc0ab28f9195f08416
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 14 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 7 |
2 files changed, 8 insertions, 13 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 050f4c2ba0..cea3f2cd70 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <commonlib/region.h> #include <bootmode.h> +#include <cf9_reset.h> #include <string.h> #include <arch/cpu.h> #include <arch/io.h> @@ -312,9 +313,7 @@ static void init_dram_ddr3(int min_tck, int s3resume) && reg_5d10 && !s3resume) { MCHBAR32(0x5d10) = 0; /* Need reset. */ - outb(0x6, 0xcf9); - - halt(); + system_reset(); } early_pch_init_native(); @@ -326,8 +325,7 @@ static void init_dram_ddr3(int min_tck, int s3resume) if (cache_not_found || (region_device_sz(&rdev) < sizeof(ctrl))) { if (s3resume) { /* Failed S3 resume, reset to come up cleanly */ - outb(0x6, 0xcf9); - halt(); + system_reset(); } ctrl_cached = NULL; } else { @@ -356,8 +354,7 @@ static void init_dram_ddr3(int min_tck, int s3resume) if (err) { if (s3resume) { /* Failed S3 resume, reset to come up cleanly */ - outb(0x6, 0xcf9); - halt(); + system_reset(); } /* no need to erase bad mrc cache here, it gets overwritten on * successful boot. */ @@ -430,8 +427,7 @@ static void init_dram_ddr3(int min_tck, int s3resume) save_timings(&ctrl); if (s3resume && !cbmem_was_inited) { /* Failed S3 resume, reset to come up cleanly */ - outb(0x6, 0xcf9); - halt(); + system_reset(); } if (!s3resume) diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 8c4f27d9fc..a68ae49c7c 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -16,6 +16,7 @@ #include <console/console.h> #include <console/usb.h> #include <bootmode.h> +#include <cf9_reset.h> #include <string.h> #include <arch/io.h> #include <device/pci_ops.h> @@ -212,8 +213,7 @@ void sdram_initialize(struct pei_data *pei_data) /* If MRC data is not found we cannot continue S3 resume. */ if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { printk(BIOS_DEBUG, "Giving up in sdram_initialize: No MRC data\n"); - outb(0x6, 0xcf9); - halt(); + system_reset(); } /* Pass console handler in pei_data */ @@ -310,7 +310,6 @@ void perform_raminit(int s3resume) if (s3resume && !cbmem_was_initted) { /* Failed S3 resume, reset to come up cleanly */ - outb(0x6, 0xcf9); - halt(); + system_reset(); } } |