summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-11-13 10:03:31 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-19 08:17:06 +0000
commit0ce41f1a116a816e774ebbd1130d27d7ee70e7e9 (patch)
tree983a793e01bbf09ed1e9c74534d4b78f9d3f2866 /src/northbridge/intel
parent16f9bf83e00c786275d3fcc9d512d145ef6c93c9 (diff)
downloadcoreboot-0ce41f1a116a816e774ebbd1130d27d7ee70e7e9.tar.xz
src: Add required space after "switch"
Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 4e5c0ce923..32fa0d9cf0 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -820,7 +820,7 @@ static void program_dll(struct sysinfo *s)
FOR_EACH_POPULATED_CHANNEL(s->dimms, i) {
const struct dll_setting *setting;
- switch(s->selected_timings.mem_clk) {
+ switch (s->selected_timings.mem_clk) {
default: /* Should not happen */
case MEM_CLOCK_667MHz:
setting = default_ddr2_667_ctrl;