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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-13 09:30:09 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-19 16:24:05 +0200 |
| commit | 38cf94b25098e4aee1f4ea16df2110140eca8222 (patch) | |
| tree | 5baa7b7fcf6180d4875f1d54b6ffb88a57879f5a /src/northbridge/intel | |
| parent | 3387e4e770a37bc09289ffa59fa3c781d8970126 (diff) | |
| download | coreboot-38cf94b25098e4aee1f4ea16df2110140eca8222.tar.xz | |
ivybridge native gfx init: Adjust state to be compatible with OPROM.
My main payload is GRUB and I load SeaBIOS as secondary payload when for some
reason I want to boot windows. In this scenario SeaBIOS runs VGA oprom
(SeaVGABIOS is not good enough with intel gfx). VGA oprom expects either
completely uninited gfx or some special state in gmbus and software scratch
registers. Provide this state.
The only alternative without this patch for such usecase is to use oprom and
I'd like to avoid doing so when going my main boot path to GNU/Linux.
Change-Id: I38e78fb845e43b81df084cd4d65f4618bfb2506d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10205
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index 6c1295a73b..8fa780f5e8 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -206,6 +206,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, enable_port(mmio); intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data, 128); + intel_gmbus_stop(mmio + PCH_GMBUS0); decode_edid(edid_data, sizeof(edid_data), &edid); @@ -236,9 +237,8 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, u32 pixel_m1 = 1; u32 pixel_m2 = 1; -#if !IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) vga_textmode_init(); -#else +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) vga_sr_write(1, 1); vga_sr_write(0x2, 0xf); vga_sr_write(0x3, 0x0); @@ -513,6 +513,13 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, set_vbe_mode_info_valid(&edid, lfb); #endif + /* Doesn't change any hw behaviour but vga oprom expects it there. */ + write32(mmio + 0x0004f040, 0x01000008); + write32(mmio + 0x0004f044, 0x00001800); + write32(mmio + 0x0004f04c, 0x7f7f0000); + write32(mmio + 0x0004f054, 0x0000422d); + write32(mmio + 0x0004f05c, 0x00000008); + /* Linux relies on VBT for panel info. */ generate_fake_intel_oprom(info, dev_find_slot(0, PCI_DEVFN(2, 0)), "$VBT SNB/IVB-MOBILE "); |