diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-11 11:25:41 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-11-08 20:12:31 +0100 |
commit | 689ddf68323633ec96cf6455d8a323fb6f019503 (patch) | |
tree | dbd44ed8952145db39d3330719e7a733c158530f /src/northbridge/intel | |
parent | 67bfbfdfebb280fae5d2aac5e68bb8f014a7de71 (diff) | |
download | coreboot-689ddf68323633ec96cf6455d8a323fb6f019503.tar.xz |
fsp_rangeley: Switch to per-device ACPI
Change-Id: Ic8b2204a6d08d63ac7f05836bf1424f1ca6ee50e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7046
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/fsp_rangeley/Kconfig | 1 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_rangeley/acpi.c | 14 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_rangeley/northbridge.c | 13 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_rangeley/northbridge.h | 1 |
4 files changed, 29 insertions, 0 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/Kconfig b/src/northbridge/intel/fsp_rangeley/Kconfig index c1353ca165..2d2eda70d1 100644 --- a/src/northbridge/intel/fsp_rangeley/Kconfig +++ b/src/northbridge/intel/fsp_rangeley/Kconfig @@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_FSP_RANGELEY bool select CPU_INTEL_FSP_MODEL_406DX + select PER_DEVICE_ACPI_TABLES if NORTHBRIDGE_INTEL_FSP_RANGELEY diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c index 895f5b4861..b2ddc88f93 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi.c +++ b/src/northbridge/intel/fsp_rangeley/acpi.c @@ -30,6 +30,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <build.h> +#include <arch/acpi.h> +#include <arch/acpigen.h> #include "northbridge.h" unsigned long acpi_fill_mcfg(unsigned long current) @@ -64,3 +66,15 @@ unsigned long acpi_fill_mcfg(unsigned long current) return current; } + +void northbridge_acpi_fill_ssdt_generator(void) +{ + u32 bmbound; + char pscope[] = "\\_SB.PCI0"; + + bmbound = sideband_read(B_UNIT, BMBOUND); + acpigen_write_scope(pscope); + acpigen_write_name_dword("BMBD", bmbound); + acpigen_pop_len(); + generate_cpu_entries(); +} diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index 07ce21fed3..be3a3acfb8 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -212,6 +212,18 @@ static void northbridge_enable(device_t dev) { } +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + static struct pci_operations intel_pci_ops = { .set_subsystem = intel_set_subsystem, }; @@ -231,6 +243,7 @@ static struct device_operations mc_ops = { .set_resources = mc_set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, + .acpi_fill_ssdt_generator = northbridge_acpi_fill_ssdt_generator, .enable = northbridge_enable, .scan_bus = 0, .ops_pci = &intel_pci_ops, diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index 855a056789..abce07aefa 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -72,6 +72,7 @@ void dump_pci_devices(void); void dump_spd_registers(void); void dump_mem(unsigned start, unsigned end); void report_platform_info(void); +void northbridge_acpi_fill_ssdt_generator(void); #endif /* #ifndef __ASSEMBLER__ */ #endif /* #ifndef __ACPI__ */ |