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authorArthur Heymans <arthur@aheymans.xyz>2017-08-26 21:24:21 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-08-27 13:22:46 +0000
commit5bb27b7815b00ed789f474133eb52c73075a200f (patch)
tree761b892addc33e77507f21b7954e37809b964e10 /src/northbridge/intel
parentafa627db2ee414db4e31c64082bdee267e33af0b (diff)
downloadcoreboot-5bb27b7815b00ed789f474133eb52c73075a200f.tar.xz
nb/intel/pineview: Fix typo in DRAM timing computation
This problem was introduced in: 12a4e98cea nb/intel/pineview/raminit: Refactor timings selection Change-Id: Iace3dabb8546d7a721ef13526ba02522dc712fdd Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21214 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/pineview/raminit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index eae136eed1..9bb8fd8b84 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -396,7 +396,7 @@ static void sdram_detect_smallest_params(struct sysinfo *s)
mult[s->selected_timings.mem_clock]));
s->selected_timings.tRRD = MIN(15, DIV_ROUND_UP(maxtrrd,
mult[s->selected_timings.mem_clock]));
- s->selected_timings.tRTP = MIN(15, DIV_ROUND_UP(maxtras,
+ s->selected_timings.tRTP = MIN(15, DIV_ROUND_UP(maxtrtp,
mult[s->selected_timings.mem_clock]));
PRINTK_DEBUG("Selected timings:\n");