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| author | Iru Cai <mytbk920423@gmail.com> | 2019-01-01 16:35:53 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:10:46 +0800 |
| commit | 47776c8decbce5627446dd2c22aa31eee866e16e (patch) | |
| tree | 70d48eeebb5167caddc0a58b7672f5f847d59b71 /src/northbridge/intel | |
| parent | cc3312866a5a155ac858d9c88851d769ad14938a (diff) | |
| download | coreboot-47776c8decbce5627446dd2c22aa31eee866e16e.tar.xz | |
[NOT TESTED] expand frag_usb_fffaed66 to frag_usb_fffaed46
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/mrc_frags.c | 14 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/pei_usb.asm | 14 |
2 files changed, 11 insertions, 17 deletions
diff --git a/src/northbridge/intel/haswell/mrc_frags.c b/src/northbridge/intel/haswell/mrc_frags.c index 3f51686585..10748c8f5a 100644 --- a/src/northbridge/intel/haswell/mrc_frags.c +++ b/src/northbridge/intel/haswell/mrc_frags.c @@ -423,8 +423,8 @@ static const u32 ref_fffcb9f0[17] = { 0x0f000000 }; -void frag_usb_fffaed66(PEI_USB *upd, void *xbar); -void frag_usb_fffaed66(PEI_USB *upd, void *xbar) +void frag_usb_fffaed46(PEI_USB *upd, void *xbar); +void frag_usb_fffaed46(PEI_USB *upd, void *xbar) { #define XBAR_AND_OR(a, andv, orv) bar_update32(xbar, a, andv, orv) #define XBAR_OR(a, orv) bar_or32(xbar, a, orv) @@ -436,6 +436,7 @@ void frag_usb_fffaed66(PEI_USB *upd, void *xbar) int sku = mrc_sku_type(); int rev = mrc_pch_revision(); u32 tmp1, tmp2; + device_t dev = PCI_DEV(0, 0x14, 0); /* XBAR is e8100000 printk(BIOS_DEBUG, "XBAR is %p.\n", xbar); @@ -444,9 +445,12 @@ void frag_usb_fffaed66(PEI_USB *upd, void *xbar) if ((upd->xhci_resume_info[2] & 3) == 0) return; + pci_write_config32(dev, 0x10, (u32)xbar); + pci_or_config32(dev, 4, 6); + tmp1 = 0; if (sku == 1) { - tmp2 = (pci_read_config32(PCI_DEV(0, 0x14, 0), 0xe0) & 0x18) - 8; + tmp2 = (pci_read_config32(dev, 0xe0) & 0x18) - 8; if (tmp2 <= 0x10) tmp1 = ref_fffcb9f0[tmp2]; else @@ -494,8 +498,8 @@ void frag_usb_fffaed66(PEI_USB *upd, void *xbar) XBAR_RW32(0x8180, 0xcb0028); XBAR_RW32(0x8184, 0x64001e); } - pci_or_config16(PCI_DEV(0, 0x14, 0), 0x44, 0xc401); - pci_or_config8(PCI_DEV(0, 0x14, 0), 0x46, 0xf); + pci_or_config16(dev, 0x44, 0xc401); + pci_or_config8(dev, 0x46, 0xf); if (rev > 3 && sku == 2) { XBAR_OR(0x8188, 0x5000000); } else if (rev != 0 && sku == 1) { diff --git a/src/northbridge/intel/haswell/pei_usb.asm b/src/northbridge/intel/haswell/pei_usb.asm index ed9dc32c55..097b2e0ba1 100644 --- a/src/northbridge/intel/haswell/pei_usb.asm +++ b/src/northbridge/intel/haswell/pei_usb.asm @@ -11,7 +11,7 @@ extern ref_fffcb99c extern ref_fffcc988 extern xhci_setup_ss_route extern frag_usb_fffaecbe -extern frag_usb_fffaed66 +extern frag_usb_fffaed46 extern frag_usb_fffaeb10 mrc_init_usb: @@ -102,19 +102,9 @@ add esp, 8 call frag_usb_fffaecbe -loc_fffaed46: -mov eax, dword [ebp - 0x30] -test byte [eax + 0x57], 3 -je short loc_fffaed66 ; je 0xfffaed66 -mov dword [edi + 0xa0010], ebx -mov ax, word [edi + 0xa0004] -or eax, 6 -mov word [edi + 0xa0004], ax - -loc_fffaed66: push ebx push dword [ebp - 0x30] -call frag_usb_fffaed66 +call frag_usb_fffaed46 add esp, 8 loc_fffaefd0: |