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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-07-08 16:41:05 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-07-08 16:41:05 +0000 |
| commit | 6f57b514cb6e0598b295a3d8a4345dd42209e1e6 (patch) | |
| tree | bb54404f902b1339bdba36523d4ba069628b5532 /src/northbridge/intel | |
| parent | 817d7542f708215c4128b6cdc39ca7d7e1256b26 (diff) | |
| download | coreboot-6f57b514cb6e0598b295a3d8a4345dd42209e1e6.tar.xz | |
Fix all warnings in the tree
(does not fix the cmos.layout race yet)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/i3100/i3100.h | 10 | ||||
| -rw-r--r-- | src/northbridge/intel/i3100/reset_test.c | 2 |
2 files changed, 11 insertions, 1 deletions
diff --git a/src/northbridge/intel/i3100/i3100.h b/src/northbridge/intel/i3100/i3100.h index bbdad3f3c1..8aae1a9aed 100644 --- a/src/northbridge/intel/i3100/i3100.h +++ b/src/northbridge/intel/i3100/i3100.h @@ -17,6 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __I3100_H__ +#define __I3100_H__ + #define IURBASE 0X14 #define MCHCFG0 0X50 #define MCHSCRB 0X52 @@ -60,3 +63,10 @@ /* DRC */ #define DRC_NOECC_MODE (0 << 20) #define DRC_72BIT_ECC (1 << 20) + + +#ifdef __GNUC__ +int bios_reset_detected(void); +#endif + +#endif diff --git a/src/northbridge/intel/i3100/reset_test.c b/src/northbridge/intel/i3100/reset_test.c index 9cf4d89d7e..de86f8024d 100644 --- a/src/northbridge/intel/i3100/reset_test.c +++ b/src/northbridge/intel/i3100/reset_test.c @@ -6,7 +6,7 @@ /* To see if I have already booted I check to see if memory * has been enabled. */ -static int bios_reset_detected(void) +int bios_reset_detected(void) { uint32_t dword; |