diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-02-09 08:46:25 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 09:23:18 +0000 |
| commit | 6275360d562630bd538fb804bc00525ac31b5f37 (patch) | |
| tree | 6ba5ee0ec05442e1dbe2ad4355e2ec9fae9906e5 /src/northbridge/intel | |
| parent | ab8743c02e3e30ade3b70198c3cd8e9f33b183ec (diff) | |
| download | coreboot-6275360d562630bd538fb804bc00525ac31b5f37.tar.xz | |
nb/intel/pineview: Get rid of device_t
Use of `device_t` has been abandoned in ramstage.
Change-Id: Icec2e5f722c1f15493e5861b47f64698250f5813
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/pineview/gma.c | 6 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/northbridge.c | 12 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c index d47fc0eb89..ec332e6230 100644 --- a/src/northbridge/intel/pineview/gma.c +++ b/src/northbridge/intel/pineview/gma.c @@ -74,7 +74,7 @@ void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) static int gtt_setup(u8 *mmiobase) { u32 gttbase; - device_t dev = dev_find_slot(0, PCI_DEVFN(0,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0,0)); gttbase = pci_read_config32(dev, BGSM); printk(BIOS_DEBUG, "gttbase = %08x\n", gttbase); @@ -298,7 +298,7 @@ static void gma_func0_init(struct device *dev) intel_gma_restore_opregion(); } -static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void gma_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -312,7 +312,7 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) const struct i915_gpu_controller_info *intel_gma_get_controller_info(void) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); if (!dev) { printk(BIOS_WARNING, "WARNING: Can't find IGD (0,2,0)\n"); return NULL; diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index ea55974ea0..61b9edbc74 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -35,7 +35,7 @@ */ static const int legacy_hole_base_k = 0xa0000 / 1024; -static void add_fixed_resources(device_t dev, int index) +static void add_fixed_resources(struct device *dev, int index) { struct resource *resource; @@ -51,7 +51,7 @@ static void add_fixed_resources(device_t dev, int index) (0x100000 - 0xc0000) >> 10); } -static void mch_domain_read_resources(device_t dev) +static void mch_domain_read_resources(struct device *dev) { u64 tom, touud; u32 tomk, tolud, tseg_sizek; @@ -127,7 +127,7 @@ static void mch_domain_read_resources(device_t dev) add_fixed_resources(dev, index); } -static void mch_domain_set_resources(device_t dev) +static void mch_domain_set_resources(struct device *dev) { struct resource *res; @@ -137,7 +137,7 @@ static void mch_domain_set_resources(device_t dev) assign_resources(dev->link_list); } -static void mch_domain_init(device_t dev) +static void mch_domain_init(struct device *dev) { u32 reg32; @@ -156,7 +156,7 @@ static struct device_operations pci_domain_ops = { .acpi_fill_ssdt_generator = generate_cpu_entries, }; -static void cpu_bus_init(device_t dev) +static void cpu_bus_init(struct device *dev) { initialize_cpus(dev->link_list); } @@ -169,7 +169,7 @@ static struct device_operations cpu_bus_ops = { }; -static void enable_dev(device_t dev) +static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { |