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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 13:20:01 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:28:19 +0000 |
| commit | 64943a31556112b381bba05c7ddad00ab2cb9551 (patch) | |
| tree | b109a391e31effad94e8dbff03d0000c522c3631 /src/northbridge/intel | |
| parent | e2a2877adf6aedebfe718a126de0fc985d0660f3 (diff) | |
| download | coreboot-64943a31556112b381bba05c7ddad00ab2cb9551.tar.xz | |
nb/intel/ironlake/hostbridge_regs: Drop D0F0_PMBASE
This register does not seem to exist on Ironlake.
Change-Id: I3fba6a3fd443f2c9eab874e1d1b8f081f58b1536
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43728
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/ironlake/hostbridge_regs.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/ironlake/hostbridge_regs.h b/src/northbridge/intel/ironlake/hostbridge_regs.h index 087e3ef986..cd865aae73 100644 --- a/src/northbridge/intel/ironlake/hostbridge_regs.h +++ b/src/northbridge/intel/ironlake/hostbridge_regs.h @@ -14,8 +14,6 @@ #define PCIEXBAR 0x60 #define DMIBAR 0x68 -#define D0F0_PMBASE 0x78 - #define LAC 0x87 /* Legacy Access Control */ #define D0F0_REMAPBASE 0x98 |