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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-18 08:42:51 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-11-01 11:35:01 +0000
commitc7783a39f8e660899b956883838c9b11938ca3de (patch)
treef645eb78324cf4059ff57261be17063b53d2029b /src/northbridge/intel
parent99bf4366a6184f08bda0c4cbabea384bfe995bfa (diff)
downloadcoreboot-c7783a39f8e660899b956883838c9b11938ca3de.tar.xz
nb/intel: Remove unused 'barrier()'
Change-Id: I0c33a1f3f9c33c15a901fe90258ed989e9641701 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36124 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/fsp_rangeley/northbridge.h1
-rw-r--r--src/northbridge/intel/haswell/haswell.h1
-rw-r--r--src/northbridge/intel/i945/i945.h2
-rw-r--r--src/northbridge/intel/nehalem/nehalem.h1
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h1
5 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h
index 8375fbf38c..fd5fa05a39 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.h
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.h
@@ -52,7 +52,6 @@
#define P_UNIT 4
#ifndef __ASSEMBLER__
-static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_RG_MIN 0x1F00
#define PCI_DEVICE_ID_RG_MAX 0x1F0F
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index bd89609601..fce94166a7 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -202,7 +202,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
-static inline void barrier(void) { asm("" ::: "memory"); }
void intel_northbridge_haswell_finalize_smm(void);
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 69a6413f42..4dd5379469 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -361,8 +361,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
-static inline void barrier(void) { asm("" ::: "memory"); }
-
int i945_silicon_revision(void);
void i945_early_initialization(void);
void i945_late_initialization(int s3resume);
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index bff55958ae..ebec63d898 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -245,7 +245,6 @@ typedef struct {
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
-static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_SB 0x0104
#define PCI_DEVICE_ID_IB 0x0154
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index d505728a3b..8664c5d311 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -202,7 +202,6 @@ enum platform_type {
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
-static inline void barrier(void) { asm("" ::: "memory"); }
#ifdef __SMM__
void intel_sandybridge_finalize_smm(void);