summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2017-03-20 16:32:07 +0100
committerNico Huber <nico.h@gmx.de>2017-05-21 01:50:49 +0200
commitcfa2eaa4cc268e9ed23c5a8635bb8125d985c94e (patch)
tree9fece9ed51964e2f3c4abf7bd7c49d2ce641aec5 /src/northbridge/intel
parent3db82be764bea9796a46bed436765f1194a29a27 (diff)
downloadcoreboot-cfa2eaa4cc268e9ed23c5a8635bb8125d985c94e.tar.xz
nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUP
Hides JEDEC steps using the RAM_SPEW macro. Also hides a hexdump of SPDs. Change-Id: Ie2b484cf1f1d296823df0473e852d9d07ca20246 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/x4x/raminit.c7
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr2.c2
2 files changed, 6 insertions, 3 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index f852181d4a..e842fb5163 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -55,8 +55,11 @@ static void sdram_read_spds(struct sysinfo *s)
if (j == 62)
s->dimms[i].card_type = ((u8) status) & 0x1f;
}
- if (status >= 0)
- hexdump(s->dimms[i].spd_data, 64);
+
+ if (status >= 0) {
+ if (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP))
+ hexdump(s->dimms[i].spd_data, 64);
+ }
}
s->spd_type = 0;
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 2178e24505..3a4cf03ea9 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -1185,7 +1185,7 @@ static void jedec_ddr2(struct sysinfo *s)
}
dojedec_ddr2(r + ch*4, ch, jedec[i][0], v);
udelay(1);
- //printk(BIOS_DEBUG, "Jedec step %d\n", i);
+ printk(RAM_SPEW, "Jedec step %d\n", i);
}
}
printk(BIOS_DEBUG, "MRS done\n");