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authorGreg Watson <jarrah@users.sourceforge.net>2003-06-13 17:21:10 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2003-06-13 17:21:10 +0000
commit26ba0f5f9bb04e296c3a6320a855639c2f14e83c (patch)
treedd62e2605de3c6014ff322af607178385bbd740f /src/northbridge/motorola
parent64b2e474b14f3d23565363464e15fe2ec54e248e (diff)
downloadcoreboot-26ba0f5f9bb04e296c3a6320a855639c2f14e83c.tar.xz
Freebios2
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/motorola')
-rw-r--r--src/northbridge/motorola/mpc107/meminfo.c2
-rw-r--r--src/northbridge/motorola/mpc107/mpc107.c47
-rw-r--r--src/northbridge/motorola/mpc107/mpc107_smp.c9
3 files changed, 33 insertions, 25 deletions
diff --git a/src/northbridge/motorola/mpc107/meminfo.c b/src/northbridge/motorola/mpc107/meminfo.c
index 7245fc419d..935a5e0ac8 100644
--- a/src/northbridge/motorola/mpc107/meminfo.c
+++ b/src/northbridge/motorola/mpc107/meminfo.c
@@ -18,7 +18,7 @@
* MA 02111-1307 USA
*/
-#include <printk.h>
+#include <console/console.h>
#include "mpc107.h"
void
diff --git a/src/northbridge/motorola/mpc107/mpc107.c b/src/northbridge/motorola/mpc107/mpc107.c
index 76f368a9a5..ed02fb73d1 100644
--- a/src/northbridge/motorola/mpc107/mpc107.c
+++ b/src/northbridge/motorola/mpc107/mpc107.c
@@ -19,11 +19,12 @@
*/
#include <bsp.h>
#include <ppc.h>
-#include <pci.h>
+#include <types.h>
+#include <device/pci.h>
#include <mem.h>
#include <types.h>
#include <string.h>
-#include <printk.h>
+#include <console/console.h>
#include <arch/io.h>
#include "i2c.h"
#include "mpc107.h"
@@ -32,10 +33,8 @@
#define NUM_DIMMS 1
#define NUM_BANKS 2
-extern struct pci_ops pci_direct_ppc;
-
struct mem_range *
-getmeminfo(void)
+sizeram(void)
{
int i;
sdram_dimm_info dimm[NUM_DIMMS];
@@ -99,6 +98,10 @@ hostbridge_config_memory(int no_banks, sdram_bank_info * bank, int for_real)
u32 memend1, memend2;
u32 extmemend1, extmemend2;
u32 address;
+ struct device *dev;
+
+ if ((dev = dev_find_slot(0, 0)) == NULL )
+ return 0;
/* Set up the ignore mask */
for(i = 0; i < no_banks; i++)
@@ -146,9 +149,9 @@ hostbridge_config_memory(int no_banks, sdram_bank_info * bank, int for_real)
}
/* Read in configuration of port X */
- pci_direct_ppc.read_dword(0, 0, 0xf0, &mccr1);
- pci_direct_ppc.read_dword(0, 0, 0xf4, &mccr2);
- pci_direct_ppc.read_dword(0, 0, 0xfc, &mccr4);
+ mccr1 = pci_read_config32(dev, 0xf0);
+ mccr2 = pci_read_config32(dev, 0xf4);
+ mccr4 = pci_read_config32(dev, 0xfc);
mccr1 &= 0xfff00000;
mccr2 &= 0xffe00000;
mccr3 = 0;
@@ -265,20 +268,20 @@ hostbridge_config_memory(int no_banks, sdram_bank_info * bank, int for_real)
if (for_real)
{
- pci_direct_ppc.write_byte(0, 0, 0xa0, bank_enable);
- pci_direct_ppc.write_dword(0, 0, 0x80, memstart1);
- pci_direct_ppc.write_dword(0, 0, 0x84, memstart2);
- pci_direct_ppc.write_dword(0, 0, 0x88, extmemstart1);
- pci_direct_ppc.write_dword(0, 0, 0x8c, extmemstart2);
- pci_direct_ppc.write_dword(0, 0, 0x90, memend1);
- pci_direct_ppc.write_dword(0, 0, 0x94, memend2);
- pci_direct_ppc.write_dword(0, 0, 0x98, extmemend1);
- pci_direct_ppc.write_dword(0, 0, 0x9c, extmemend2);
-
- pci_direct_ppc.write_dword(0, 0, 0xfc, mccr4);
- pci_direct_ppc.write_dword(0, 0, 0xf8, mccr3);
- pci_direct_ppc.write_dword(0, 0, 0xf4, mccr2);
- pci_direct_ppc.write_dword(0, 0, 0xf0, mccr1);
+ pci_write_config8(dev, 0xa0, bank_enable);
+ pci_write_config32(dev, 0x80, memstart1);
+ pci_write_config32(dev, 0x84, memstart2);
+ pci_write_config32(dev, 0x88, extmemstart1);
+ pci_write_config32(dev, 0x8c, extmemstart2);
+ pci_write_config32(dev, 0x90, memend1);
+ pci_write_config32(dev, 0x94, memend2);
+ pci_write_config32(dev, 0x98, extmemend1);
+ pci_write_config32(dev, 0x9c, extmemend2);
+
+ pci_write_config32(dev, 0xfc, mccr4);
+ pci_write_config32(dev, 0xf8, mccr3);
+ pci_write_config32(dev, 0xf4, mccr2);
+ pci_write_config32(dev, 0xf0, mccr1);
}
return address;
diff --git a/src/northbridge/motorola/mpc107/mpc107_smp.c b/src/northbridge/motorola/mpc107/mpc107_smp.c
index 408a87fddb..c23e686334 100644
--- a/src/northbridge/motorola/mpc107/mpc107_smp.c
+++ b/src/northbridge/motorola/mpc107/mpc107_smp.c
@@ -1,4 +1,5 @@
-#include <pci.h>
+#include <types.h>
+#include <device/pci.h>
#include "mpc107.h"
void
@@ -10,8 +11,12 @@ unsigned long
this_processors_id(void)
{
u32 pic1;
+ struct device *dev;
- pcibios_read_config_dword(0, 0, MPC107_PIC1, &pic1);
+ if ((dev = dev_find_slot(0, 0)) == NULL)
+ return 0;
+
+ pic1 = pci_read_config32(dev, MPC107_PIC1);
return (pic1 & MPC107_PIC1_CF_MP_ID) >> 14;
}