printk_foo -> printk(BIOS_FOO, ...)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

7 files changed, 75 insertions, 77 deletions

diff --git a/src/northbridge/via/cx700/cx700_lpc.c b/src/northbridge/via/cx700/cx700_lpc.c
index 943838720a..d6495aba61 100644
--- a/src/northbridge/via/cx700/cx700_lpc.c
+++ b/src/northbridge/via/cx700/cx700_lpc.c
@@ -56,7 +56,7 @@ static unsigned char *pin_to_irq(const unsigned char *pin)
 
 static void pci_routing_fixup(struct device *dev)
 {
-	printk_debug("%s: device is %p\n", __FUNCTION__, dev);
+	printk(BIOS_DEBUG, "%s: device is %p\n", __FUNCTION__, dev);
 
 	/* set up PCI IRQ routing */
 	pci_write_config8(dev, 0x55, pci_irqs[0] << 4);
@@ -64,17 +64,17 @@ static void pci_routing_fixup(struct device *dev)
 	pci_write_config8(dev, 0x57, pci_irqs[3] << 4);
 
 	/* Assigning IRQs */
-	printk_debug("Setting up USB interrupts.\n");
+	printk(BIOS_DEBUG, "Setting up USB interrupts.\n");
 	pci_assign_irqs(0, 0x10, pin_to_irq(usb_pins));
 
-	printk_debug("Setting up VGA interrupts.\n");
+	printk(BIOS_DEBUG, "Setting up VGA interrupts.\n");
 	pci_assign_irqs(1, 0x00, pin_to_irq(vga_pins));
 
-	printk_debug("Setting up PCI slot interrupts.\n");
+	printk(BIOS_DEBUG, "Setting up PCI slot interrupts.\n");
 	pci_assign_irqs(2, 0x04, pin_to_irq(slot_pins));
 	// more?
 
-	printk_debug("Setting up AC97 interrupts.\n");
+	printk(BIOS_DEBUG, "Setting up AC97 interrupts.\n");
 	pci_assign_irqs(0x80, 0x1, pin_to_irq(ac97_pins));
 }
 
@@ -169,7 +169,7 @@ static void cx700_set_lpc_registers(struct device *dev)
 {
 	unsigned char enables;
 
-	printk_debug("VIA CX700 LPC bridge init\n");
+	printk(BIOS_DEBUG, "VIA CX700 LPC bridge init\n");
 
 	// enable the internal I/O decode
 	enables = pci_read_config8(dev, 0x6C);
diff --git a/src/northbridge/via/cx700/cx700_sata.c b/src/northbridge/via/cx700/cx700_sata.c
index 893126606e..993b05ad0a 100644
--- a/src/northbridge/via/cx700/cx700_sata.c
+++ b/src/northbridge/via/cx700/cx700_sata.c
@@ -46,7 +46,7 @@ static void sata_init(struct device *dev)
 {
 	u8 reg8;
 
-	printk_debug("Configuring VIA SATA & EIDE Controller\n");
+	printk(BIOS_DEBUG, "Configuring VIA SATA & EIDE Controller\n");
 
 	/* Class IDE Disk, instead of RAID controller */
 	reg8 = pci_read_config8(dev, 0x45);
@@ -57,7 +57,7 @@ static void sata_init(struct device *dev)
 	pci_write_config8(dev, 0x45, reg8);
 
 #if defined(DISABLE_SATA) && (DISABLE_SATA == 1)
-	printk_info("Disabling SATA (Primary Channel)\n");
+	printk(BIOS_INFO, "Disabling SATA (Primary Channel)\n");
 	/* Disable SATA channels */
 	pci_write_config8(dev, 0x40, 0x00);
 #else
@@ -132,12 +132,12 @@ static void sata_init(struct device *dev)
 	reg8 &= ~0xa0;
 	pci_write_config8(dev, 0x42, reg8);
 	reg8 = pci_read_config8(dev, 0x42);
-	printk_debug("Reg 0x42 read back as 0x%x\n", reg8);
+	printk(BIOS_DEBUG, "Reg 0x42 read back as 0x%x\n", reg8);
 
 	/* Support Staggered Spin-Up */
 	reg8 = pci_read_config8(dev, 0xb9);
 	if ((reg8 & 0x8) == 0) {
-		printk_debug("start OOB sequence on both drives\n");
+		printk(BIOS_DEBUG, "start OOB sequence on both drives\n");
 		reg8 |= 0x30;
 		pci_write_config8(dev, 0xb9, reg8);
 	}
diff --git a/src/northbridge/via/cx700/cx700_usb.c b/src/northbridge/via/cx700/cx700_usb.c
index b2dc482df3..a85189477f 100644
--- a/src/northbridge/via/cx700/cx700_usb.c
+++ b/src/northbridge/via/cx700/cx700_usb.c
@@ -28,7 +28,7 @@ static void usb_init(struct device *dev)
 	u8 reg8;
 
 	/* USB Specification says the device must be Bus Master */
-	printk_debug("UHCI: Setting up controller.. ");
+	printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
 
 	reg32 = pci_read_config32(dev, PCI_COMMAND);
 	pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
@@ -37,7 +37,7 @@ static void usb_init(struct device *dev)
 	reg8 |= (1 << 0);
 	pci_write_config8(dev, 0xca, reg8);
 
-	printk_debug("done.\n");
+	printk(BIOS_DEBUG, "done.\n");
 }
 
 static struct device_operations usb_ops = {
diff --git a/src/northbridge/via/cx700/cx700_vga.c b/src/northbridge/via/cx700/cx700_vga.c
index bcb7d9e8a9..c259b376ad 100644
--- a/src/northbridge/via/cx700/cx700_vga.c
+++ b/src/northbridge/via/cx700/cx700_vga.c
@@ -49,7 +49,7 @@ void write_protect_vgabios(void)
 {
 	device_t dev;
 
-	printk_debug("write_protect_vgabios\n");
+	printk(BIOS_DEBUG, "write_protect_vgabios\n");
 
 	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0);
 	if (dev)
@@ -64,7 +64,7 @@ static void vga_init(device_t dev)
 {
 	u8 reg8;
 
-	printk_debug("Initializing VGA...\n");
+	printk(BIOS_DEBUG, "Initializing VGA...\n");
 
 	//*
 	pci_write_config8(dev, 0x04, 0x07);
@@ -75,10 +75,10 @@ static void vga_init(device_t dev)
 	pci_write_config8(dev, 0x3c, 0x0b);
 	//*/
 
-	printk_debug("Executing VGA option rom in real mode\n");
+	printk(BIOS_DEBUG, "Executing VGA option rom in real mode\n");
 	setup_realmode_idt();
 	do_vgabios();
-	printk_debug("Enable VGA console\n");
+	printk(BIOS_DEBUG, "Enable VGA console\n");
 	vga_enable_console();
 
 	/* It's not clear if these need to be programmed before or after
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index b08dc17869..6a69d434fb 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -119,7 +119,7 @@ static void pci_domain_set_resources(device_t dev)
 #if CONFIG_WRITE_HIGH_TABLES == 1
 	high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
 	high_tables_size = HIGH_TABLES_SIZE* 1024;
-	printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+	printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
 #endif
 
 	/* Report the memory regions */
diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c
index e0277f29bb..d28b8e37c4 100644
--- a/src/northbridge/via/cx700/raminit.c
+++ b/src/northbridge/via/cx700/raminit.c
@@ -26,7 +26,7 @@
 
 /* Debugging macros. */
 #if CONFIG_DEBUG_RAM_SETUP
-#define PRINTK_DEBUG(x...)      printk_debug(x)
+#define PRINTK_DEBUG(x...)      printk(BIOS_DEBUG, x)
 #else
 #define PRINTK_DEBUG(x...)
 #endif
@@ -105,9 +105,9 @@
 #define REGISTERPRESET(bus,dev,fun,bdfspec) \
 	{ u8 i, reg; \
 		for (i=0; i<(sizeof((bdfspec))/sizeof(struct regmask)); i++) { \
-			printk_debug("Writing bus " #bus " dev " #dev " fun " #fun " register "); \
-			printk_debug("%02x", (bdfspec)[i].reg); \
-			printk_debug("\n"); \
+			printk(BIOS_DEBUG, "Writing bus " #bus " dev " #dev " fun " #fun " register "); \
+			printk(BIOS_DEBUG, "%02x", (bdfspec)[i].reg); \
+			printk(BIOS_DEBUG, "\n"); \
 			reg = pci_read_config8(PCI_DEV((bus), (dev), (fun)), (bdfspec)[i].reg); \
 			reg &= (bdfspec)[i].mask; \
 			reg |= (bdfspec)[i].val; \
@@ -184,7 +184,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 
 	regs = pci_read_config8(MEMCTRL, 0x6c);
 	if (regs & (1 << 6))
-		printk_debug("DDR2 Detected.\n");
+		printk(BIOS_DEBUG, "DDR2 Detected.\n");
 	else
 		die("ERROR: DDR1 memory detected but not supported by coreboot.\n");
 
@@ -201,25 +201,25 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 	/* SPD 9 SDRAM Cycle Time */
 	GET_SPD(dimm, spds, regs, 9);
 
-	printk_debug("\nDDRII ");
+	printk(BIOS_DEBUG, "\nDDRII ");
 	if (spds <= 0x3d) {
-		printk_debug("533");
+		printk(BIOS_DEBUG, "533");
 		val = DDRII_533;
 		t = 38;
 	} else if (spds <= 0x50) {
-		printk_debug("400");
+		printk(BIOS_DEBUG, "400");
 		val = DDRII_400;
 		t = 50;
 	} else if (spds <= 0x60) {
-		printk_debug("333");
+		printk(BIOS_DEBUG, "333");
 		val = DDRII_333;
 		t = 60;
 	} else if (spds <= 0x75) {
-		printk_debug("266");
+		printk(BIOS_DEBUG, "266");
 		val = DDRII_266;
 		t = 75;
 	} else {
-		printk_debug("200");
+		printk(BIOS_DEBUG, "200");
 		val = DDRII_200;
 		t = 100;
 	}
@@ -259,45 +259,45 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 	/* SPD 9 18 23 25 CAS Latency NB3DRAM_REG62[2:0] */
 	/* Read SPD byte 18 CAS Latency */
 	GET_SPD(dimm, spds, regs, SPD_CAS_LAT);
-	printk_debug("\nCAS Supported ");
+	printk(BIOS_DEBUG, "\nCAS Supported ");
 	if (spds & SPD_CAS_LAT_2)
-		printk_debug("2 ");
+		printk(BIOS_DEBUG, "2 ");
 	if (spds & SPD_CAS_LAT_3)
-		printk_debug("3 ");
+		printk(BIOS_DEBUG, "3 ");
 	if (spds & SPD_CAS_LAT_4)
-		printk_debug("4 ");
+		printk(BIOS_DEBUG, "4 ");
 	if (spds & SPD_CAS_LAT_5)
-		printk_debug("5 ");
+		printk(BIOS_DEBUG, "5 ");
 	if (spds & SPD_CAS_LAT_6)
-		printk_debug("6");
+		printk(BIOS_DEBUG, "6");
 
 	/* We don't consider CAS = 6, because CX700 doesn't support it */
-	printk_debug("\n CAS:");
+	printk(BIOS_DEBUG, "\n CAS:");
 	if (spds & SPD_CAS_LAT_5) {
-		printk_debug("Starting at CL5");
+		printk(BIOS_DEBUG, "Starting at CL5");
 		val = 0x3;
 		/* See whether we can improve it */
 		GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_1);
 		if ((spds & SPD_CAS_LAT_4) && (tmp < 0x50)) {
-			printk_debug("\n... going to CL4");
+			printk(BIOS_DEBUG, "\n... going to CL4");
 			val = 0x2;
 		}
 		GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_2);
 		if ((spds & SPD_CAS_LAT_3) && (tmp < 0x50)) {
-			printk_debug("\n... going to CL3");
+			printk(BIOS_DEBUG, "\n... going to CL3");
 			val = 0x1;
 		}
 	} else {
-		printk_debug("Starting at CL4");
+		printk(BIOS_DEBUG, "Starting at CL4");
 		val = 0x2;
 		GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_1);
 		if ((spds & SPD_CAS_LAT_3) && (tmp < 0x50)) {
-			printk_debug("\n... going to CL3");
+			printk(BIOS_DEBUG, "\n... going to CL3");
 			val = 0x1;
 		}
 		GET_SPD(dimm, tmp, regs, SPD_CAS_LAT_MIN_X_2);
 		if ((spds & SPD_CAS_LAT_2) && (tmp < 0x50)) {
-			printk_debug("\n... going to CL2");
+			printk(BIOS_DEBUG, "\n... going to CL2");
 			val = 0x0;
 		}
 	}
@@ -308,7 +308,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 
 	/* SPD 27 Trp NB3DRAM_REG64[3:2] */
 	GET_SPD(dimm, spds, regs, SPD_TRP);
-	printk_debug("\nTrp %d", spds);
+	printk(BIOS_DEBUG, "\nTrp %d", spds);
 	spds >>= 2;
 	for (val = 2; val <= 5; val++) {
 		if (spds <= (val * t / 10)) {
@@ -324,7 +324,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 
 	/* SPD 29 Trcd NB3DRAM_REG64[7:6] */
 	GET_SPD(dimm, spds, regs, SPD_TRCD);
-	printk_debug("\nTrcd %d", spds);
+	printk(BIOS_DEBUG, "\nTrcd %d", spds);
 	spds >>= 2;
 	for (val = 2; val <= 5; val++) {
 		if (spds <= (val * t / 10)) {
@@ -340,7 +340,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 
 	/* SPD 30 Tras NB3DRAM_REG62[7:4] */
 	GET_SPD(dimm, spds, regs, SPD_TRAS);
-	printk_debug("\nTras %d", spds);
+	printk(BIOS_DEBUG, "\nTras %d", spds);
 	for (val = 5; val <= 20; val++) {
 		if (spds <= (val * t / 10)) {
 			val = val - 5;
@@ -355,7 +355,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 
 	/* SPD 42 SPD 40 Trfc NB3DRAM_REG61[5:0] */
 	GET_SPD(dimm, spds, regs, SPD_TRFC);
-	printk_debug("\nTrfc %d", spds);
+	printk(BIOS_DEBUG, "\nTrfc %d", spds);
 	tmp = spds;
 	GET_SPD(dimm, spds, regs, SPD_EX_TRC_TRFC);
 	if (spds & 0x1)
@@ -382,7 +382,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 		}
 	}
 	val <<= 6;
-	printk_debug("\nTrrd val = 0x%x", val);
+	printk(BIOS_DEBUG, "\nTrrd val = 0x%x", val);
 	regs = pci_read_config8(MEMCTRL, 0x63);
 	regs &= ~0xc0;
 	regs |= val;
@@ -397,7 +397,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 		}
 	}
 	val <<= 6;
-	printk_debug("\nTwr val = 0x%x", val);
+	printk(BIOS_DEBUG, "\nTwr val = 0x%x", val);
 
 	regs = pci_read_config8(MEMCTRL, 0x61);
 	regs &= ~0xc0;
@@ -407,13 +407,13 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 	/* SPD 37 Twtr NB3DRAM_REG63[1] */
 	GET_SPD(dimm, spds, regs, SPD_TWTR);
 	spds >>= 2;
-	printk_debug("\nTwtr 0x%x", spds);
+	printk(BIOS_DEBUG, "\nTwtr 0x%x", spds);
 	if (spds <= (t * 2 / 10))
 		val = 0;
 	else
 		val = 1;
 	val <<= 1;
-	printk_debug("\nTwtr val = 0x%x", val);
+	printk(BIOS_DEBUG, "\nTwtr val = 0x%x", val);
 
 	regs = pci_read_config8(MEMCTRL, 0x63);
 	regs &= ~0x2;
@@ -423,13 +423,13 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 	/* SPD 38 Trtp NB3DRAM_REG63[3] */
 	GET_SPD(dimm, spds, regs, SPD_TRTP);
 	spds >>= 2;
-	printk_debug("\nTrtp 0x%x", spds);
+	printk(BIOS_DEBUG, "\nTrtp 0x%x", spds);
 	if (spds <= (t * 2 / 10))
 		val = 0;
 	else
 		val = 1;
 	val <<= 3;
-	printk_debug("\nTrtp val = 0x%x", val);
+	printk(BIOS_DEBUG, "\nTrtp val = 0x%x", val);
 
 	regs = pci_read_config8(MEMCTRL, 0x63);
 	regs &= ~0x8;
@@ -534,7 +534,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
 			val += spds;
 		}
 	}
-	printk_debug("\nchip #%d", val);
+	printk(BIOS_DEBUG, "\nchip #%d", val);
 	if (val > 18)
 		regs = 0xdb;
 	else
@@ -852,7 +852,7 @@ static void step_2_19(const struct mem_controller *ctrl)
 	i |= DDR2_Twr_table[val];
 	read32(i);
 
-	printk_debug("MRS = %08x\n", i);
+	printk(BIOS_DEBUG, "MRS = %08x\n", i);
 
 	udelay(15);
 
@@ -1073,7 +1073,7 @@ static void sdram_enable(const struct mem_controller *ctrl)
 		else
 			sdram_clear_vr_addr(ctrl, i);
 	}
-	printk_debug("\nDQSI Low %08x", dl);
+	printk(BIOS_DEBUG, "\nDQSI Low %08x", dl);
 	for (dh = dl; dh < 0x3f; dh += 2) {
 		reg8 = dh & 0x3f;
 		reg8 |= 0x80;	/* Set Manual Mode */
@@ -1106,7 +1106,7 @@ static void sdram_enable(const struct mem_controller *ctrl)
 			break;
 		}
 	}
-	printk_debug("\nDQSI High %02x", dh);
+	printk(BIOS_DEBUG, "\nDQSI High %02x", dh);
 	pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_CHA_DQSI_LOW_REG, dl);
 	pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_CHA_DQSI_HIGH_REG, dh);
 	reg8 = pci_read_config8(MEMCTRL, 0X90) & 0X7;
diff --git a/src/northbridge/via/cx700/vgabios.c b/src/northbridge/via/cx700/vgabios.c
index 042d99e831..72b841f6f8 100644
--- a/src/northbridge/via/cx700/vgabios.c
+++ b/src/northbridge/via/cx700/vgabios.c
@@ -315,10 +315,10 @@ void do_vgabios(void)
 	dev = dev_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0);
 
 	if (!dev) {
-		printk_debug("NO VGA FOUND\n");
+		printk(BIOS_DEBUG, "NO VGA FOUND\n");
 		return;
 	}
-	printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device);
+	printk(BIOS_DEBUG, "found VGA: vid=%x, did=%x\n", dev->vendor, dev->device);
 
 	/* declare rom address here - keep any config data out of the way
 	 * of core LXB stuff */
@@ -326,7 +326,7 @@ void do_vgabios(void)
 #warning ROM address hardcoded to 512K
 	rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); 
 	pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
-	printk_debug("rom base, size: %x\n", rom);
+	printk(BIOS_DEBUG, "rom base, size: %x\n", rom);
 
 	buf = (unsigned char *)rom;
 	if ((buf[0] == 0x55) && (buf[1] == 0xaa)) {
@@ -339,13 +339,13 @@ void do_vgabios(void)
 		if (buf[0] == 0x55 && buf[1] == 0xAA) {
 			busdevfn =
 			    (dev->bus->secondary << 8) | dev->path.pci.devfn;
-			printk_debug("bus/devfn = %#x\n", busdevfn);
+			printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
 
 			real_mode_switch_call_vga(busdevfn);
 		} else
-			printk_debug("Failed to copy VGA BIOS to 0xc0000\n");
+			printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n");
 	} else
-		printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]);
+		printk(BIOS_DEBUG, "BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]);
 
 	pci_write_config32(dev, PCI_ROM_ADDRESS, 0);
 }
@@ -512,28 +512,28 @@ int biosint(unsigned long intnumber,
 	cs = cs_ip >> 16;
 	flags = stackflags;
 
-	printk_debug("biosint: INT# 0x%lx\n", intnumber);
-	printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
+	printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber);
+	printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
 		     eax, ebx, ecx, edx);
-	printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
+	printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
 		     ebp, esp, edi, esi);
-	printk_debug("biosint:  ip 0x%x   cs 0x%x  flags 0x%x\n",
+	printk(BIOS_DEBUG, "biosint:  ip 0x%x   cs 0x%x  flags 0x%x\n",
 		     ip, cs, flags);
 
 	// cases in a good compiler are just as good as your own tables. 
 	switch (intnumber) {
 	case 0 ... 15:
 		// These are not BIOS service, but the CPU-generated exceptions
-		printk_info("biosint: Oops, exception %u\n", intnumber);
+		printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
 		if (esp < 0x1000) {
-			printk_debug("Stack contents: ");
+			printk(BIOS_DEBUG, "Stack contents: ");
 			while (esp < 0x1000) {
-				printk_debug("0x%04x ", *(unsigned short *)esp);
+				printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *)esp);
 				esp += 2;
 			}
-			printk_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
-		printk_debug("biosint: Bailing out\n");
+		printk(BIOS_DEBUG, "biosint: Bailing out\n");
 		// "longjmp"
 		vga_exit();
 		break;
@@ -552,7 +552,7 @@ int biosint(unsigned long intnumber,
 				  &ebx, &edx, &ecx, &eax, &flags);
 		break;
 	default:
-		printk_info("BIOSINT: Unsupport int #0x%x\n", intnumber);
+		printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber);
 		break;
 	}
 	if (ret)
@@ -669,7 +669,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
 				// devfn is an int, so we mask it off. 
 				busdevfn = (dev->bus->secondary << 8)
 				    | (dev->path.pci.devfn & 0xff);
-				printk_debug("0x%x: return 0x%x\n", func,
+				printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func,
 					     busdevfn);
 				*pebx = busdevfn;
 				retval = 0;
@@ -696,8 +696,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
 			reg = *pedi;
 			dev = dev_find_slot(bus, devfn);
 			if (!dev) {
-				printk_debug
-				    ("0x%x: BAD DEVICE bus %d devfn 0x%x\n",
+				printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n",
 				     func, bus, devfn);
 				// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
 				*peax = PCIBIOS_BADREG;
@@ -732,15 +731,14 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
 
 			if (retval)
 				retval = PCIBIOS_BADREG;
-			printk_debug
-			    ("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
+			printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
 			     func, bus, devfn, reg, *pecx);
 			*peax = 0;
 			retval = 0;
 		}
 		break;
 	default:
-		printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
+		printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
 		break;
 	}