via epia-m now works with default x86.c instead of its own copy of vgabios.c.

Allows to drop quite a bunch of nasty code

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 160 insertions, 81 deletions

diff --git a/src/northbridge/via/vt8623/Makefile.inc b/src/northbridge/via/vt8623/Makefile.inc
index c9dc918ecc..47682ad13d 100644
--- a/src/northbridge/via/vt8623/Makefile.inc
+++ b/src/northbridge/via/vt8623/Makefile.inc
@@ -19,4 +19,5 @@
 ##
 
 driver-y += northbridge.o
+driver-y += vga.o
 
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index c7a992138b..4920ec3973 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -105,82 +105,6 @@ static const struct pci_driver agp_driver __pci_driver = {
 	.device = PCI_DEVICE_ID_VIA_8633_1,
 };
 
-static void vga_init(device_t dev)
-{
-	//unsigned long fb;
-	//msr_t clocks1,clocks2,instructions,setup;
-
-	printk(BIOS_DEBUG, "VGA random fixup ...\n");
-	pci_write_config8(dev, 0x04, 0x07);
-	pci_write_config8(dev, 0x0d, 0x20);
-	pci_write_config32(dev,0x10,0xd8000008);
-	pci_write_config32(dev,0x14,0xdc000000);
-
-	// set up performnce counters for debugging vga init sequence
-	//setup.lo = 0x1c0; // count instructions
-	//wrmsr(0x187,setup);
-	//instructions.hi = 0;
-	//instructions.lo = 0;
-	//wrmsr(0xc2,instructions);
-	//clocks1 = rdmsr(0x10);
-
-	
-#if 0
-	/* code to make vga init go through the emulator - as of yet this does not workfor the epia-m */
-	pci_dev_init(dev);
-	
-	call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
-	
-	//clocks2 = rdmsr(0x10);
-	//instructions = rdmsr(0xc2);
-	
-	printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
-	printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
-	printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
-
-#else
-
-	/* code to make vga init run in real mode - does work but against the current coreboot philosophy */
-	printk(BIOS_DEBUG, "INSTALL REAL-MODE IDT\n");
-        setup_realmode_idt();
-        printk(BIOS_DEBUG, "DO THE VGA BIOS\n");
-        do_vgabios();
-
-	//clocks2 = rdmsr(0x10);
-	//instructions = rdmsr(0xc2);
-	
-	//printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
-	//printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
-	//printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
-
-        vga_enable_console();
-	
-#endif
-
-	pci_write_config32(dev,0x30,0);
-
-	/* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
-#if 0
-	add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
-	fb = pci_read_config32(dev,0x10); // get the fb address
-	add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
-#endif
-}
-
-static struct device_operations vga_operations = {
-	.read_resources   = pci_dev_read_resources,
-	.set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_dev_enable_resources,
-	.init             = vga_init,
-	.ops_pci          = 0,
-};
-
-static const struct pci_driver vga_driver __pci_driver = {
-	.ops = &vga_operations,
-	.vendor = PCI_VENDOR_ID_VIA,
-	.device = 0x3122,
-};
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
diff --git a/src/northbridge/via/vt8623/northbridge.h b/src/northbridge/via/vt8623/northbridge.h
index f589860cd5..b3a2e75f15 100644
--- a/src/northbridge/via/vt8623/northbridge.h
+++ b/src/northbridge/via/vt8623/northbridge.h
@@ -2,11 +2,7 @@
 #define NORTHBRIDGE_VIA_VT8623_H
 
 unsigned int vt8623_scan_root_bus(device_t root, unsigned int max);
-
-void vga_enable_console(void);
-void do_vgabios(void);
-void setup_realmode_idt(void);
+extern void (*vga_enable_console)(void) __attribute__((regparm(0)));
 void write_protect_vgabios(void);
 
-
 #endif /* NORTHBRIDGE_VIA_VT8623_H */
diff --git a/src/northbridge/via/vt8623/vga.c b/src/northbridge/via/vt8623/vga.c
new file mode 100644
index 0000000000..7dbb7831b1
--- /dev/null
+++ b/src/northbridge/via/vt8623/vga.c
@@ -0,0 +1,158 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <arch/io.h>
+#include <stdint.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <stdlib.h>
+#include <string.h>
+#include <bitops.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
+#include <arch/interrupt.h>
+#include "chip.h"
+#include "northbridge.h"
+
+static int via_vt8623_int15_handler(struct eregs *regs)
+{
+	int res=-1;
+	printk(BIOS_DEBUG, "via_vt8623_int15_handler\n");
+	switch(regs->eax & 0xffff) {
+	case 0x5f19:
+		break;
+	case 0x5f18:
+		regs->eax=0x5f;
+		regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
+		regs->ecx=0x060;
+		res=0;
+		break;
+	case 0x5f00:
+		regs->eax = 0x8600;
+		break;
+	case 0x5f01:
+		regs->eax = 0x5f;
+		regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type =  2 = 1024 * 768
+		res = 0;
+		break;
+	case 0x5f02:
+		regs->eax=0x5f;
+		regs->ebx= (regs->ebx & 0xffff0000) | 2;
+		regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+		regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
+		res=0;
+		break;
+	case 0x5f0f:
+		regs->eax=0x860f;
+		break;
+        default:
+		printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+				regs->eax & 0xffff);
+		break;
+	}
+	return res;
+}
+
+void write_protect_vgabios(void)
+{
+	device_t dev;
+
+	printk(BIOS_DEBUG, "write_protect_vgabios\n");
+
+	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
+	if (dev)
+		pci_write_config8(dev, 0x61, 0xaa);
+
+	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
+	if (dev)
+		pci_write_config8(dev, 0x61, 0xaa);
+}
+
+static void vga_random_fixup(device_t dev)
+{
+	printk(BIOS_DEBUG, "VGA random fixup ...\n");
+	pci_write_config8(dev, 0x04, 0x07);
+	pci_write_config8(dev, 0x0d, 0x20);
+	pci_write_config32(dev,0x10,0xd8000008);
+	pci_write_config32(dev,0x14,0xdc000000);
+}
+
+static void vga_init(device_t dev)
+{
+	vga_random_fixup(dev);
+
+	mainboard_interrupt_handlers(0x15, &via_vt8623_int15_handler);
+
+#ifdef MEASURE_VGA_INIT_TIME
+	msr_t clocks1, clocks2, instructions, setup;
+
+	// set up performnce counters for debugging vga init sequence
+	setup.lo = 0x1c0; // count instructions
+	wrmsr(0x187,setup);
+	instructions.hi = 0;
+	instructions.lo = 0;
+	wrmsr(0xc2,instructions);
+	clocks1 = rdmsr(0x10);
+#endif
+	printk(BIOS_DEBUG, "Initializing VGA...\n");
+
+	pci_dev_init(dev);
+
+	printk(BIOS_DEBUG, "Enable VGA console\n");
+	// this is how it should look:
+	//   call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
+	// this is how it looks:
+	vga_enable_console();
+	
+#ifdef MEASURE_VGA_INIT_TIME
+	clocks2 = rdmsr(0x10);
+	instructions = rdmsr(0xc2);
+	
+	printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
+	printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
+	printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
+#endif
+
+	pci_write_config32(dev, 0x30, 0);
+
+#if 0
+	/* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
+	unsigned long fb;
+	add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
+	fb = pci_read_config32(dev,0x10); // get the fb address
+	add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
+#endif
+}
+
+static struct device_operations vga_operations = {
+	.read_resources = pci_dev_read_resources,
+	.set_resources = pci_dev_set_resources,
+	.enable_resources = pci_dev_enable_resources,
+	.init = vga_init,
+	.ops_pci = 0,
+};
+
+static const struct pci_driver vga_driver __pci_driver = {
+	.ops = &vga_operations,
+	.vendor = PCI_VENDOR_ID_VIA,
+	.device = 0x3122,
+};