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author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-05-27 17:06:54 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-05-27 17:06:54 +0000 |
commit | 5c044c732fc28b09eb58956a85b141af194f2b94 (patch) | |
tree | fde799f7c44df7b06e0ad0f98b06fb54571c265a /src/northbridge/via/vx800/dram_util.h | |
parent | f2a4e63f926a59759309d93e1af60e3c3f7d5c13 (diff) | |
download | coreboot-5c044c732fc28b09eb58956a85b141af194f2b94.tar.xz |
Make directory hierarchy flat to match the same layout we use
for other chipsets, as suggested on IRC.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via/vx800/dram_util.h')
-rw-r--r-- | src/northbridge/via/vx800/dram_util.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/northbridge/via/vx800/dram_util.h b/src/northbridge/via/vx800/dram_util.h new file mode 100644 index 0000000000..725fd670fc --- /dev/null +++ b/src/northbridge/via/vx800/dram_util.h @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2009 One Laptop per Child, Association, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __DRAM_UTIL_H__ +#define __DRAM_UTIL_H__ + +#define STEPSPAN 0x1000 //the span when test memory in spare mode +#define TESTCOUNT 0x4 // the test count in each range when test memory in spare mode +#define TEST_PATTERN 0x5A5A5A5A //the test pattern + +typedef enum __DRAM_TEST_MODE { + EXTENSIVE, + SPARE, + MAXMODE +} DRAM_TEST_MODE; + +void WaitMicroSec(UINTN MicroSeconds); + +void via_write_phys(u32 addr, u32 value); + +u32 via_read_phys(u32 addr); + +u32 DimmRead(u32 x); + +BOOLEAN DramBaseTest(u32 BaseAdd, u32 Length, + DRAM_TEST_MODE mode, BOOLEAN PrintFlag); + +void DumpRegisters(INTN DevNum, INTN FuncNum); + +void dumpnorth(u8 Func); +#endif |