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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-24 02:02:42 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-31 03:45:19 +0000
commitf99fa1058dc89fb4fc0c23f0217a0257fffdf9f9 (patch)
tree51b22089587d0a680507b7c976cfb382f36ec6e7 /src/northbridge/via/vx800/early_serial.c
parente99f0390b9b8e04b197b165e6e63826ce9631d35 (diff)
downloadcoreboot-f99fa1058dc89fb4fc0c23f0217a0257fffdf9f9.tar.xz
Remove VIA VX800 northbridge support
Change-Id: Id6026e9d7ff064d54b0dd93e80dabdcc4efd2b8e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26679 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/vx800/early_serial.c')
-rw-r--r--src/northbridge/via/vx800/early_serial.c94
1 files changed, 0 insertions, 94 deletions
diff --git a/src/northbridge/via/vx800/early_serial.c b/src/northbridge/via/vx800/early_serial.c
deleted file mode 100644
index 8393aa79b1..0000000000
--- a/src/northbridge/via/vx800/early_serial.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 One Laptop per Child, Association, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-/*
- * Enable the serial devices on the VIA
- */
-#include <arch/io.h>
-
-/* The base address is 0x15c, 0x2e, depending on config bytes */
-
-#define SIO_BASE 0x3f0
-#define SIO_DATA SIO_BASE+1
-
-static void vx800_writepnpaddr(uint8_t val)
-{
- outb(val, 0x2e);
- outb(val, 0xeb);
-}
-
-static void vx800_writepnpdata(uint8_t val)
-{
- outb(val, 0x2f);
- outb(val, 0xeb);
-}
-
-static void vx800_writesiobyte(uint16_t reg, uint8_t val)
-{
- outb(val, reg);
-}
-
-static void vx800_writesioword(uint16_t reg, uint16_t val)
-{
- outw(val, reg);
-}
-
-/* regs we use: 85, and the southbridge devfn is defined by the
- mainboard
- */
-
-void enable_vx800_serial(void)
-{
- post_code(0x06);
- outb(0x03, 0x22);
-
- // turn on pnp
- vx800_writepnpaddr(0x87);
- vx800_writepnpaddr(0x87);
- // now go ahead and set up com1.
- // set address
- vx800_writepnpaddr(0x7);
- vx800_writepnpdata(0x2);
- // enable serial out
- vx800_writepnpaddr(0x30);
- vx800_writepnpdata(0x1);
- // serial port 1 base address (FEh)
- vx800_writepnpaddr(0x60);
- vx800_writepnpdata(0xfe);
- // serial port 1 IRQ (04h)
- vx800_writepnpaddr(0x70);
- vx800_writepnpdata(0x4);
- // serial port 1 control
- vx800_writepnpaddr(0xf0);
- vx800_writepnpdata(0x2);
- // turn of pnp
- vx800_writepnpaddr(0xaa);
-
- // set up reg to set baud rate.
- vx800_writesiobyte(0x3fb, 0x80);
- // Set 115 kb
- vx800_writesioword(0x3f8, 1);
- // Set 9.6 kb
- // WRITESIOWORD(0x3f8, 12)
- // now set no parity, one stop, 8 bits
- vx800_writesiobyte(0x3fb, 3);
- // now turn on RTS, DRT
- vx800_writesiobyte(0x3fc, 3);
- // Enable interrupts
- vx800_writesiobyte(0x3f9, 0xf);
- // should be done. Dump a char for fun.
- vx800_writesiobyte(0x3f8, 48);
- post_code(0x07);
-}