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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-17 14:13:21 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-19 16:55:09 +0000 |
commit | 967ed213dce37d0a6959317600b06b27b186ddda (patch) | |
tree | fe149cafe78ceca3d6e6c65ce2c513065e187a34 /src/northbridge/via/vx900/early_vx900.c | |
parent | 8a25caee0507655d775e3dcc21b36b01ca517113 (diff) | |
download | coreboot-967ed213dce37d0a6959317600b06b27b186ddda.tar.xz |
via/vx900: Remove leftover code
Code is not used with EARLY_CBMEM_INIT and it
appears to have been invalid register anyways.
Change-Id: If0662937b38aec71292113ce8abd88da0b73feee
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/vx900/early_vx900.c')
-rw-r--r-- | src/northbridge/via/vx900/early_vx900.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c index 54a30af6bb..126094101c 100644 --- a/src/northbridge/via/vx900/early_vx900.c +++ b/src/northbridge/via/vx900/early_vx900.c @@ -18,12 +18,6 @@ #include <arch/io.h> #include <console/console.h> -uintptr_t restore_top_of_low_cacheable(void) -{ - u8 reg_tom = pci_read_config8(MCU, 0x88); - return (reg_tom << 24) - 256 * MiB; -} - /** * \brief Enable accessing of PCI configuration space for all devices. * |