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author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-05 21:02:23 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2016-10-09 21:36:47 +0200 |
commit | e7aeb2f60212077521f7d71a4f485c8f4a26f6c6 (patch) | |
tree | 2c9b89bd9d2bd173aaee4f7e36e65217573d1fc7 /src/northbridge/via/vx900/lpc.c | |
parent | 83b9703505becf34728a2286a3ad3e6749a4d619 (diff) | |
download | coreboot-e7aeb2f60212077521f7d71a4f485c8f4a26f6c6.tar.xz |
src/northbridge/via: Remove commented code
Change-Id: Ic589b26c6c94df12e1fe218d079018db8b38fbd9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16898
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/vx900/lpc.c')
-rw-r--r-- | src/northbridge/via/vx900/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c index 4f3d704a8c..a9d24df91f 100644 --- a/src/northbridge/via/vx900/lpc.c +++ b/src/northbridge/via/vx900/lpc.c @@ -77,7 +77,7 @@ static void vx900_lpc_dma_setup(device_t dev) /* Enable Positive South Module PCI Cycle Decoding */ /* FIXME: Setting this seems to hang our system */ - //pci_mod_config8(dev, 0x58, 0, 1<<4); + /* Positive decoding for ROM + APIC + On-board IO ports */ pci_mod_config8(dev, 0x6c, 0, (1 << 2) | (1 << 3) | (1 << 7)); /* Enable DMA channels. BIOS guide recommends DMA channel 2 off */ |