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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-08 13:48:36 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-21 06:21:13 +0200
commitc0beb6d4185db33eeabbceefd9004769253973a3 (patch)
treeef23f865a4f2dd3abe102891c2c2be7a25315fb2 /src/northbridge/via/vx900
parent3d45c4077665a17735c69576638dc510f96a2dff (diff)
downloadcoreboot-c0beb6d4185db33eeabbceefd9004769253973a3.tar.xz
timestamps epia-m850: Cleanup without enabling timestamps
Remove the existing hack, platform needs a fix for EARLY_CBMEM_INIT. Change-Id: I7ce373c9698878d9fa056983e4fb571a68239c52 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3913 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/via/vx900')
-rw-r--r--src/northbridge/via/vx900/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc
index 13d7de65ed..15fd859210 100644
--- a/src/northbridge/via/vx900/Makefile.inc
+++ b/src/northbridge/via/vx900/Makefile.inc
@@ -29,7 +29,6 @@ romstage-y += ./../../../southbridge/via/common/early_smbus_print_error.c
romstage-y += ./../../../southbridge/via/common/early_smbus_reset.c
romstage-y += ./../../../southbridge/via/common/early_smbus_wait_until_ready.c
romstage-y += ./../../../drivers/pc80/udelay_io.c
-romstage-$(CONFIG_COLLECT_TIMESTAMPS) += ./../../../lib/cbmem.c
ramstage-y += pci_util.c
ramstage-y += pcie.c