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authorStefan Reinauer <stepan@coresystems.de>2009-04-30 13:58:42 +0000
committerStefan Reinauer <stepan@openbios.org>2009-04-30 13:58:42 +0000
commitb5fb0c5c4eda2329d848aedcf4f7e8b6dc8012b2 (patch)
tree9a0897635ecbeab0dd64124cd165d3460174a359 /src/northbridge/via
parent6841ce653741b3dafe8e3482b4a93adbaee53552 (diff)
downloadcoreboot-b5fb0c5c4eda2329d848aedcf4f7e8b6dc8012b2.tar.xz
Add high tables support to all northbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via')
-rw-r--r--src/northbridge/via/cn700/Config.lb6
-rw-r--r--src/northbridge/via/cn700/northbridge.c13
-rw-r--r--src/northbridge/via/cx700/northbridge.c12
-rw-r--r--src/northbridge/via/vt8601/Config.lb5
-rw-r--r--src/northbridge/via/vt8601/northbridge.c13
-rw-r--r--src/northbridge/via/vt8623/Config.lb5
-rw-r--r--src/northbridge/via/vt8623/northbridge.c34
7 files changed, 62 insertions, 26 deletions
diff --git a/src/northbridge/via/cn700/Config.lb b/src/northbridge/via/cn700/Config.lb
index 6a0b60cfe0..b824a17b75 100644
--- a/src/northbridge/via/cn700/Config.lb
+++ b/src/northbridge/via/cn700/Config.lb
@@ -18,8 +18,14 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
object vgabios.o
+
driver northbridge.o
driver agp.o
driver vga.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index af914528d9..2d3adf1288 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -163,6 +163,12 @@ static u32 find_pci_tolm(struct bus *bus)
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+/* maximum size of high tables in KB */
+#define HIGH_TABLES_SIZE 64
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
/* The order is important to find the correct RAM size. */
@@ -199,6 +205,13 @@ static void pci_domain_set_resources(device_t dev)
/* The PCI hole does does not overlap the memory. */
tolmk = tomk;
}
+
+#if HAVE_HIGH_TABLES == 1
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE* 1024;
+ printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
/* Report the memory regions. */
idx = 10;
/* TODO: Hole needed? */
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index 11c98da2ca..c7bbb8bf85 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -123,12 +123,6 @@ static void pci_domain_set_resources(device_t dev)
else
tomk = (((rambits << 6) - (4 << reg) - 1) * 1024);
-#if HAVE_HIGH_TABLES == 1
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE* 1024;
- printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
-#endif
-
/* Compute the top of Low memory */
tolmk = pci_tolm >> 10;
if (tolmk >= tomk) {
@@ -137,6 +131,12 @@ static void pci_domain_set_resources(device_t dev)
tolmk -= 1024; // TOP 1M SM Memory
}
+#if HAVE_HIGH_TABLES == 1
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE* 1024;
+ printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
/* Report the memory regions */
idx = 10;
diff --git a/src/northbridge/via/vt8601/Config.lb b/src/northbridge/via/vt8601/Config.lb
index 16463e0ccd..9cf0154983 100644
--- a/src/northbridge/via/vt8601/Config.lb
+++ b/src/northbridge/via/vt8601/Config.lb
@@ -1,2 +1,7 @@
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 5347017ddf..b1e1c494cb 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -101,6 +101,12 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+/* maximum size of high tables in KB */
+#define HIGH_TABLES_SIZE 64
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
static const uint8_t ramregs[] = {
@@ -140,6 +146,13 @@ static void pci_domain_set_resources(device_t dev)
*/
tolmk = tomk;
}
+
+#if HAVE_HIGH_TABLES == 1
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE* 1024;
+ printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
/* Report the memory regions */
idx = 10;
ram_resource(dev, idx++, 0, tolmk);
diff --git a/src/northbridge/via/vt8623/Config.lb b/src/northbridge/via/vt8623/Config.lb
index 16463e0ccd..9cf0154983 100644
--- a/src/northbridge/via/vt8623/Config.lb
+++ b/src/northbridge/via/vt8623/Config.lb
@@ -1,2 +1,7 @@
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 80a314c18a..70ba59c1d2 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -15,25 +15,11 @@
#include "northbridge.h"
/*
- * This fixup is based on capturing values from an Award bios. Without
+ * This fixup is based on capturing values from an Award BIOS. Without
* this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
* slower than normal, ethernet drops packets).
* Apparently these registers govern some sort of bus master behavior.
*/
-#if 0
-static void dump_dev(device_t dev)
-{
- int i,j;
-
- for(i = 0; i < 256; i += 16) {
- printk_debug("0x%x: ", i);
- for(j = 0; j < 16; j++) {
- printk_debug("%02x ", pci_read_config8(dev, i+j));
- }
- printk_debug("\n");
- }
-}
-#endif
static void northbridge_init(device_t dev)
{
@@ -72,7 +58,6 @@ static void northbridge_init(device_t dev)
pci_write_config8(dev, 0xe0, c);
pci_write_config8(dev, 0xe2, 0x42); /* 'cos award does */
}
- //dump_dev(dev);
}
static void nullfunc(){}
@@ -100,7 +85,6 @@ static void agp_init(device_t dev)
pci_write_config8(dev, 0x43, 0x44);
pci_write_config8(dev, 0x44, 0x34);
pci_write_config8(dev, 0x83, 0x02);
- //dump_dev(dev);
}
static struct device_operations agp_operations = {
@@ -129,8 +113,6 @@ static void vga_init(device_t dev)
pci_write_config32(dev,0x10,0xd8000008);
pci_write_config32(dev,0x14,0xdc000000);
- //dump_dev(dev);
-
// set up performnce counters for debugging vga init sequence
//setup.lo = 0x1c0; // count instructions
//wrmsr(0x187,setup);
@@ -175,7 +157,6 @@ static void vga_init(device_t dev)
#endif
-
pci_write_config32(dev,0x30,0);
/* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
@@ -272,6 +253,12 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+/* maximum size of high tables in KB */
+#define HIGH_TABLES_SIZE 64
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
@@ -311,6 +298,13 @@ static void pci_domain_set_resources(device_t dev)
*/
tolmk = tomk;
}
+
+#if HAVE_HIGH_TABLES == 1
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE* 1024;
+ printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
/* Report the memory regions */
idx = 10;
ram_resource(dev, idx++, 0, 640); /* first 640k */