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| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-10-22 21:54:19 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-10-22 21:54:19 +0000 |
| commit | 88fbae24bc83b46b1a1f2ba88643462053dae5cf (patch) | |
| tree | a2d30095bb023f0315a3c21d5016381df0801ee9 /src/northbridge/via | |
| parent | 7f1105c431d8425cb1027e8c75787c826425c33d (diff) | |
| download | coreboot-88fbae24bc83b46b1a1f2ba88643462053dae5cf.tar.xz | |
fixes for EPIA.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via')
| -rw-r--r-- | src/northbridge/via/vt8601/raminit.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c index 57738e336e..5321e60f66 100644 --- a/src/northbridge/via/vt8601/raminit.c +++ b/src/northbridge/via/vt8601/raminit.c @@ -455,11 +455,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) // for(i = 0; i < 8; i++) base = do_module_size(0); /*, base);*/ pci_write_config8(north, ramregs[0], base); - base = do_module_size(1); /*, base);*/ - base += pci_read_config8(north, ramregs[0]); + base += do_module_size(1); /*, base);*/ pci_write_config8(north, ramregs[1], base); /* runs out of code space. */ - for(i = 0; i < 8; i++){ + for(i = 2; i < 8; i++){ pci_write_config8(north, ramregs[i], base); /* pci_write_config8(north, ramregs[3], base); |