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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-25 10:53:20 +0200
committerMartin Roth <martinroth@google.com>2019-11-29 19:23:05 +0000
commit01787608670adec26fcea48173e18395e51c790e (patch)
tree6a60df15f88244034578f80e92aa32725539fd53 /src/northbridge
parent179da7fb5cff3c9034dc3203086c84342560c600 (diff)
downloadcoreboot-01787608670adec26fcea48173e18395e51c790e.tar.xz
{northbridge,soc,southbridge}: Don't use both of _ADR and _HID
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both." Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/family14/acpi/northbridge.asl3
-rw-r--r--src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl2
-rw-r--r--src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl2
-rw-r--r--src/northbridge/amd/pi/00630F01/acpi/northbridge.asl2
-rw-r--r--src/northbridge/amd/pi/00660F01/acpi/northbridge.asl2
-rw-r--r--src/northbridge/amd/pi/00730F01/acpi/northbridge.asl3
6 files changed, 6 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
index 06199a1b07..fad157da29 100644
--- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
@@ -16,7 +16,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
@@ -125,7 +125,6 @@ Device(PE23) {
/* Northbridge function 3 */
Device(NBF3) {
- Name(_ADR, 0x00180003)
/* k10temp thermal zone */
#include "thermal_mixin.asl"
diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
index 9a1fa9ed88..96c2d8bfac 100644
--- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
@@ -16,7 +16,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
index f74b31a080..a7e8307349 100644
--- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
@@ -16,7 +16,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
index c2b3aac4c5..de47bc2151 100644
--- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
@@ -16,7 +16,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
index d54f985e90..4a48aaf401 100644
--- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
@@ -16,7 +16,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
index f74b31a080..b317ccf1ea 100644
--- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
@@ -16,10 +16,9 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
-
/* Describe the Northbridge devices */
Method(_BBN, 0, NotSerialized) /* Bus number = 0 */