diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-07-09 07:13:37 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-07-11 14:48:25 +0000 |
| commit | 2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e (patch) | |
| tree | 266234c7563d25e45b566eba394b74b14911c1ea /src/northbridge | |
| parent | bd5c721f6bd099e2fbad4dbde5e72c0b6945dad9 (diff) | |
| download | coreboot-2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e.tar.xz | |
arch/x86: Drop CBMEM_TOP_BACKUP
Code has evolved such that there seems to be little
use for global definition of cbmem_top_chipset().
Even for AMD we had three different implementations.
Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/state_machine.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15tn/state_machine.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/state_machine.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/state_machine.c | 3 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/Kconfig | 1 |
6 files changed, 7 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig index 6711f8702d..6f6e3d63a9 100644 --- a/src/northbridge/amd/agesa/Kconfig +++ b/src/northbridge/amd/agesa/Kconfig @@ -3,7 +3,6 @@ config NORTHBRIDGE_AMD_AGESA bool default CPU_AMD_AGESA - select CBMEM_TOP_BACKUP if NORTHBRIDGE_AMD_AGESA diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index 202cdaa9f5..36e5fd9416 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -2,8 +2,8 @@ #include <Porting.h> #include <AGESA.h> +#include <amdblocks/biosram.h> #include <arch/io.h> -#include <cbmem.h> #include <cf9_reset.h> #include <console/console.h> #include <device/device.h> diff --git a/src/northbridge/amd/agesa/family15tn/state_machine.c b/src/northbridge/amd/agesa/family15tn/state_machine.c index 8d450f94cd..29c1d87005 100644 --- a/src/northbridge/amd/agesa/family15tn/state_machine.c +++ b/src/northbridge/amd/agesa/family15tn/state_machine.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/biosram.h> + #include <Porting.h> #include <AGESA.h> - -#include <cbmem.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/agesa/family16kb/state_machine.c b/src/northbridge/amd/agesa/family16kb/state_machine.c index 58bc345a6d..cbf0313267 100644 --- a/src/northbridge/amd/agesa/family16kb/state_machine.c +++ b/src/northbridge/amd/agesa/family16kb/state_machine.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/biosram.h> + #include <Porting.h> #include <AGESA.h> - -#include <cbmem.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00730F01/state_machine.c b/src/northbridge/amd/pi/00730F01/state_machine.c index f3c45a01f1..a97faeb8ea 100644 --- a/src/northbridge/amd/pi/00730F01/state_machine.c +++ b/src/northbridge/amd/pi/00730F01/state_machine.c @@ -1,9 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/biosram.h> + #include "Porting.h" #include "AGESA.h" -#include <cbmem.h> #include <device/device.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index e8c3530018..833afae9df 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -4,7 +4,6 @@ config NORTHBRIDGE_AMD_PI bool default y if CPU_AMD_PI default n - select CBMEM_TOP_BACKUP if NORTHBRIDGE_AMD_PI |