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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-25 10:41:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 08:57:29 +0000
commit2a1c4302d1e6a6d34084989a0ef7e57e6f5a29a4 (patch)
treeb2ac64b76c538f906438e6f26c09542b552f29b2 /src/northbridge
parent07065edd5e8ccb334f7b865396dd8196be5c76c5 (diff)
downloadcoreboot-2a1c4302d1e6a6d34084989a0ef7e57e6f5a29a4.tar.xz
nb/intel/i945: Remove irrelevant conditional statement
After a {break,return}, "else" is generally not needed. Change-Id: Id55af179f63316f7218e93978628cbe05e94e0aa Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/gma.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 83dc42ef99..749d07b724 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -588,16 +588,15 @@ static u32 get_cdclk(struct device *const dev)
{
u16 gcfgc = pci_read_config16(dev, GCFGC);
- if (gcfgc & GC_LOW_FREQUENCY_ENABLE) {
+ if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
return 133333333;
- } else {
- switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
- case GC_DISPLAY_CLOCK_333_320_MHZ:
- return 320000000;
- default:
- case GC_DISPLAY_CLOCK_190_200_MHZ:
- return 200000000;
- }
+
+ switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
+ case GC_DISPLAY_CLOCK_333_320_MHZ:
+ return 320000000;
+ default:
+ case GC_DISPLAY_CLOCK_190_200_MHZ:
+ return 200000000;
}
}