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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-10-03 16:27:48 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-03 16:27:48 +0000
commit689a7204855406c88b6e4e4439628b52fd8c0638 (patch)
tree5ffbda07b1864620de81ebd7f167a9ef12f72a32 /src/northbridge
parent6768f39a4b5a5d6d1c2318f632f801fe1c8084cd (diff)
downloadcoreboot-689a7204855406c88b6e4e4439628b52fd8c0638.tar.xz
Tell vgabios code in a couple of boards/chipsets about CBFS
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/cn400/vgabios.c3
-rw-r--r--src/northbridge/via/cn700/vgabios.c3
-rw-r--r--src/northbridge/via/cx700/vgabios.c3
-rw-r--r--src/northbridge/via/vx800/vgabios.c3
4 files changed, 8 insertions, 4 deletions
diff --git a/src/northbridge/via/cn400/vgabios.c b/src/northbridge/via/cn400/vgabios.c
index ab66937143..9620debe9b 100644
--- a/src/northbridge/via/cn400/vgabios.c
+++ b/src/northbridge/via/cn400/vgabios.c
@@ -7,6 +7,7 @@
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -356,7 +357,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xfff80000;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("VGA BIOS ROM base address: %x\n", rom);
diff --git a/src/northbridge/via/cn700/vgabios.c b/src/northbridge/via/cn700/vgabios.c
index c645af4992..82a2bab481 100644
--- a/src/northbridge/via/cn700/vgabios.c
+++ b/src/northbridge/via/cn700/vgabios.c
@@ -7,6 +7,7 @@
//#include <printk.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -356,7 +357,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xfff80000;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
printk_debug("rom base, size: %x\n", rom);
diff --git a/src/northbridge/via/cx700/vgabios.c b/src/northbridge/via/cx700/vgabios.c
index e7ba33ab3b..042d99e831 100644
--- a/src/northbridge/via/cx700/vgabios.c
+++ b/src/northbridge/via/cx700/vgabios.c
@@ -28,6 +28,7 @@
#undef __KERNEL__
#include <arch/io.h>
#include <string.h>
+#include <cbfs.h>
void write_protect_vgabios(void);
@@ -323,7 +324,7 @@ void do_vgabios(void)
* of core LXB stuff */
#warning ROM address hardcoded to 512K
- rom = 0xfff80000;
+ rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base, size: %x\n", rom);
diff --git a/src/northbridge/via/vx800/vgabios.c b/src/northbridge/via/vx800/vgabios.c
index 85748ee004..b536b5825d 100644
--- a/src/northbridge/via/vx800/vgabios.c
+++ b/src/northbridge/via/vx800/vgabios.c
@@ -6,6 +6,7 @@
#include <arch/io.h>
#include <string.h>
#include "vgachip.h"
+#include <cbfs.h>
/* vgabios.c. Derived from: */
@@ -319,7 +320,7 @@ void do_vgabios(void)
/* declare rom address here - keep any config data out of the way
* of core LXB stuff */
- rom = 0xffffffff - CONFIG_ROM_SIZE + 1;
+ rom = cbfs_load_optionrom(dev->vendor, dev->device, 0);
pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1);
printk_debug("rom base: %x\n", rom);
buf = (unsigned char *)rom;