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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-05-23 07:11:14 +1000
committerMarc Jones <marc.jones@se-eng.com>2014-05-23 01:49:48 +0200
commit68a56caf7e9bb0203de1d4d96861ba60885a401d (patch)
tree569679953bc97036d9b11f718e09291c7f47c460 /src/northbridge
parentba363d3f185c30c51069cff711d8be8dccb3545f (diff)
downloadcoreboot-68a56caf7e9bb0203de1d4d96861ba60885a401d.tar.xz
northbridge/amd/amdmct: Incorrect usage of logical over bitwise and
Small mix up of logical/bitwise logical and operation. Spotted by Clang. Change-Id: I2c2256b9b2f2b6ca627914118c745f579555acc9 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5820 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 8c453321bb..e127322dc3 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -439,7 +439,7 @@ static void vErratum372(struct DCTStatStruc *pDCTstat)
{
msr_t msr = rdmsr(NB_CFG_MSR);
- int nbPstate1supported = ! (msr.hi && (1 << (NB_GfxNbPstateDis -32))) ;
+ int nbPstate1supported = !(msr.hi & (1 << (NB_GfxNbPstateDis -32)));
// is this the right way to check for NB pstate 1 or DDR3-1333 ?
if (((pDCTstat->PresetmaxFreq==1333)||(nbPstate1supported))
@@ -456,10 +456,10 @@ static void vErratum414(struct DCTStatStruc *pDCTstat)
for(; dct < 2 ; dct++)
{
int dRAMConfigHi = Get_NB32(pDCTstat->dev_dct,0x94 + (0x100 * dct));
- int powerDown = dRAMConfigHi && (1 << PowerDownEn ) ;
- int ddr3 = dRAMConfigHi && (1 << Ddr3Mode ) ;
+ int powerDown = dRAMConfigHi & (1 << PowerDownEn );
+ int ddr3 = dRAMConfigHi & (1 << Ddr3Mode );
int dRAMMRS = Get_NB32(pDCTstat->dev_dct,0x84 + (0x100 * dct));
- int pchgPDModeSel = dRAMMRS && (1 << PchgPDModeSel ) ;
+ int pchgPDModeSel = dRAMMRS & (1 << PchgPDModeSel);
if (powerDown && ddr3 && pchgPDModeSel )
{
Set_NB32(pDCTstat->dev_dct,0x84 + (0x100 * dct), dRAMMRS & ~(1 << PchgPDModeSel) );