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authorStefan Reinauer <stepan@coreboot.org>2010-12-17 00:08:21 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-17 00:08:21 +0000
commit85b0fa1ace685bfdb1f1febbbf5127710a314888 (patch)
tree11fac9795931c6cdca6a785301d9294e4ba9dcae /src/northbridge
parentefbfd501fee8decd0942808a47a3f9e93d30ae38 (diff)
downloadcoreboot-85b0fa1ace685bfdb1f1febbbf5127710a314888.tar.xz
drop one more version of doing serial uart output differently.
coreboot made it kind of complicated to print a character on serial. Not quite as complicated as UEFI, but too much for a good design. Fix it. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/cx700/early_serial.c2
-rw-r--r--src/northbridge/via/vx800/examples/romstage.c1
2 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/via/cx700/early_serial.c b/src/northbridge/via/cx700/early_serial.c
index 3f5020f670..503ebbb057 100644
--- a/src/northbridge/via/cx700/early_serial.c
+++ b/src/northbridge/via/cx700/early_serial.c
@@ -81,7 +81,7 @@ static void enable_cx700_serial(void)
cx700_writepnpaddr(0xaa);
// XXX This part should be fully taken care of by
- // src/pc80/serial.c:uart_init
+ // src/lib/uart8250.c:uart_init
// set up reg to set baud rate.
cx700_writesiobyte(0x3fb, 0x80);
diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 6fbc4ebad4..77029eb58a 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -28,7 +28,6 @@
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
#include "console/console.c"
#include "lib/ramtest.c"
#include "northbridge/via/vx800/vx800.h"