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| author | Felix Held <felix-coreboot@felixheld.de> | 2018-07-29 01:03:39 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-07-30 12:33:36 +0000 |
| commit | 86b299ab35f047ecc7202cc65283419470a0598d (patch) | |
| tree | 0c0d98bd7a56d6533bd7871ece300e0eaaef4c85 /src/northbridge | |
| parent | 00d2b913c3c7be24a8b52240bf313ee3e23d2609 (diff) | |
| download | coreboot-86b299ab35f047ecc7202cc65283419470a0598d.tar.xz | |
northbridge/nehalem: add MCHBAR AND/OR/AND_OR macros
The newly added macros are used for cleaning up the RAM initializatiion code.
Change-Id: I3d3782ee1fa524cf69b63ccc7eb73e9a2ace84ec
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/nehalem/nehalem.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index afb3c7dd77..bc49e96ade 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -175,7 +175,14 @@ typedef struct { #define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) #define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) #define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) -#define MCHBAR32_OR(x, or) (MCHBAR32(x) = (MCHBAR32(x) | (or))) +#define MCHBAR8_AND(x, and) (MCHBAR8(x) = MCHBAR8(x) & (and)) +#define MCHBAR8_OR(x, or) (MCHBAR8(x) = MCHBAR8(x) | (or)) +#define MCHBAR16_AND(x, and) (MCHBAR16(x) = MCHBAR16(x) & (and)) +#define MCHBAR16_OR(x, or) (MCHBAR16(x) = MCHBAR16(x) | (or)) +#define MCHBAR32_AND(x, and) (MCHBAR32(x) = MCHBAR32(x) & (and)) +#define MCHBAR32_OR(x, or) (MCHBAR32(x) = MCHBAR32(x) | (or)) +#define MCHBAR32_AND_OR(x, and, or) \ + (MCHBAR32(x) = (MCHBAR32(x) & (and)) | (or)) #define BIOS_RESET_CPL 0x5da8 /* 8bit */ |