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authorDave Frodin <dave.frodin@se-eng.com>2015-01-19 15:58:24 -0700
committerDave Frodin <dave.frodin@se-eng.com>2015-02-18 18:55:56 +0100
commit891f71a541fc036bd7de892d2eabd7df23bcecbb (patch)
tree3d24848335df84a72f7be28a888e0676d36b15d1 /src/northbridge
parent452efc23b94f66e89c6204bc6d3037fd4ed28e63 (diff)
downloadcoreboot-891f71a541fc036bd7de892d2eabd7df23bcecbb.tar.xz
amd/00730F01: Move SteppeEagle specific settings to northbridge
These settings are specific to the SteppeEagle SOC and should be made in its northbridge code rather than the CPU code. Change-Id: I1a231f95225e1414b0cbc026a2a7b7797bd91fca Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8254 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 4ffa5110fa..b59ff6c84c 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -635,9 +635,25 @@ static const struct pci_driver family10_northbridge __pci_driver = {
.device = PCI_DEVICE_ID_AMD_10H_NB_HT,
};
+static void fam16_finalize(void *chip_info)
+{
+ device_t dev;
+ u32 value;
+ dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
+ pci_write_config32(dev, 0xF8, 0);
+ pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
+
+ /* disable No Snoop */
+ dev = dev_find_slot(0, PCI_DEVFN(1, 1));
+ value = pci_read_config32(dev, 0x60);
+ value &= ~(1 << 11);
+ pci_write_config32(dev, 0x60, value);
+}
+
struct chip_operations northbridge_amd_pi_00730F01_ops = {
CHIP_NAME("AMD FAM16 Northbridge")
.enable_dev = 0,
+ .final = fam16_finalize,
};
static void domain_read_resources(device_t dev)