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| author | Greg Watson <gwatson@lanl.gov> | 2005-10-20 01:44:21 +0000 |
|---|---|---|
| committer | Greg Watson <gwatson@lanl.gov> | 2005-10-20 01:44:21 +0000 |
| commit | 8d4edc2fcd003990228f505ce717c32b45831f2d (patch) | |
| tree | 3024ed9def3ae2572c42d45facf5cf7259325f6c /src/northbridge | |
| parent | 58cb0bf1dfe1fa39760c3edcc68146fe6ed9d474 (diff) | |
| download | coreboot-8d4edc2fcd003990228f505ce717c32b45831f2d.tar.xz | |
changes to support new ppc arch
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/motorola/mpc107/mpc107_northbridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/motorola/mpc107/mpc107_northbridge.c b/src/northbridge/motorola/mpc107/mpc107_northbridge.c index 9e64213478..595afe786e 100644 --- a/src/northbridge/motorola/mpc107/mpc107_northbridge.c +++ b/src/northbridge/motorola/mpc107/mpc107_northbridge.c @@ -56,7 +56,7 @@ static void pci_domain_set_resources(device_t dev) memstart1 = pci_read_config32(mc_dev, 0x80); memstart2 = pci_read_config32(mc_dev, 0x84); extmemstart1 = pci_read_config32(mc_dev, 0x88); - extmemstart1 = pci_read_config32(mc_dev, 0x8c); + extmemstart2 = pci_read_config32(mc_dev, 0x8c); memend1 = pci_read_config32(mc_dev, 0x90); memend2 = pci_read_config32(mc_dev, 0x94); extmemend1 = pci_read_config32(mc_dev, 0x98); |