diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-04-17 10:09:17 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-24 17:12:51 +0000 |
| commit | 90b3095093512f048d055a40ffc6b7acbf2a835a (patch) | |
| tree | 28b08a1f9bbf141a7b207cbc0511260099004a2c /src/northbridge | |
| parent | ed76908e4a8bea3781a442fe0a3a557a15ebeed9 (diff) | |
| download | coreboot-90b3095093512f048d055a40ffc6b7acbf2a835a.tar.xz | |
mb/google/cyan/spd/spd.c: Fix module part number transfer
With the increase of dimm->module_part_number size from 19 to 21 (commit
35b273eea3) "include/memory_info.h: Change part number field from 19 bytes
to 21", this code is now advancing outside DDR3 SPD designated space. The
correct size is already defined as LPDDR3_SPD_PART_LEN, use it. Also make
sure to 0 terminate the string.
BUG=b:77943312
TEST=Build cyan.
Change-Id: Iba0ef4149acfc09b7672fce079df06bf1a01dff6
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge')
0 files changed, 0 insertions, 0 deletions