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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-03-14 20:17:35 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-03-14 20:17:35 +0000 |
| commit | a83b9762fce9012161eb39813f357dee673670aa (patch) | |
| tree | 4826b03781c4a81d7936d7b1195c941074901c6a /src/northbridge | |
| parent | a41ff52ba9eceb0ef72eddc8f2c14be5751d85a3 (diff) | |
| download | coreboot-a83b9762fce9012161eb39813f357dee673670aa.tar.xz | |
for different pll values.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/gx2/pll_reset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c index 248f422cc0..43c3ff144d 100644 --- a/src/northbridge/amd/gx2/pll_reset.c +++ b/src/northbridge/amd/gx2/pll_reset.c @@ -136,7 +136,7 @@ static void pll_reset(void) msr.hi = PLLMSRhi; msr.lo = PLLMSRlo; wrmsr(GLCP_SYS_RSTPLL, msr); - msr.lo |= PLLMSRhi2; + msr.lo |= PLLMSRlo1; wrmsr(GLCP_SYS_RSTPLL, msr); print_debug("Reset PLL\n\r"); |