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authorArthur Heymans <arthur@aheymans.xyz>2019-11-27 21:53:01 +0100
committerArthur Heymans <arthur@aheymans.xyz>2019-12-01 12:39:24 +0000
commita854c9d7874a4592f2ea9b8d19703c81adef33e9 (patch)
tree984debfc44fb354e76db5c9df6690a80445c0dd6 /src/northbridge
parentcd666d992de9db8f207d997a6a65373904785a09 (diff)
downloadcoreboot-a854c9d7874a4592f2ea9b8d19703c81adef33e9.tar.xz
nb/intel/x4x: Factor out hiding PCI devs in pure fn
This increases readability. Also change the update expression. '--variable' does not make much sense there. Change-Id: I64db2460115f5fb35ca197b83440f8ee47470761 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/x4x/northbridge.c53
1 files changed, 19 insertions, 34 deletions
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 39f24d302b..252e14fda6 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -206,45 +206,30 @@ static void enable_dev(struct device *dev)
dev->ops = &cpu_bus_ops;
}
-static void x4x_init(void *const chip_info)
+static void hide_pci_fn(const int dev_bit_base, const struct device *dev)
+{
+ if (!dev || dev->enabled)
+ return;
+ const unsigned int fn = PCI_FUNC(dev->path.pci.devfn);
+ const struct device *const d0f0 = pcidev_on_root(0, 0);
+ pci_update_config32(d0f0, D0F0_DEVEN, ~(1 << (dev_bit_base + fn)), 0);
+}
+
+static void hide_pci_dev(const int dev, int functions, const int dev_bit_base)
{
- int dev, fn, bit_base;
+ for (; functions >= 0; functions--)
+ hide_pci_fn(dev_bit_base, pcidev_on_root(dev, functions));
+}
+static void x4x_init(void *const chip_info)
+{
struct device *const d0f0 = pcidev_on_root(0x0, 0);
/* Hide internal functions based on devicetree info. */
- for (dev = 6; dev > 0; --dev) {
- switch (dev) {
- case 6: /* PEG1: only on P45 */
- fn = 0;
- bit_base = 13;
- break;
- case 3: /* ME */
- fn = 3;
- bit_base = 6;
- break;
- case 2: /* IGD */
- fn = 1;
- bit_base = 3;
- break;
- case 1: /* PEG0 */
- fn = 0;
- bit_base = 1;
- break;
- case 4: /* Nothing to do */
- case 5:
- continue;
- }
- for (; fn >= 0; --fn) {
- const struct device *const d =
- pcidev_on_root(dev, fn);
- if (!d || d->enabled)
- continue;
- const u32 deven = pci_read_config32(d0f0, D0F0_DEVEN);
- pci_write_config32(d0f0, D0F0_DEVEN,
- deven & ~(1 << (bit_base + fn)));
- }
- }
+ hide_pci_dev(6, 0, 13); /* PEG1: only on P45 */
+ hide_pci_dev(3, 3, 6); /* ME */
+ hide_pci_dev(2, 1, 3); /* IGD */
+ hide_pci_dev(1, 0, 1); /* PEG0 */
const u32 deven = pci_read_config32(d0f0, D0F0_DEVEN);
if (!(deven & (0xf << 6)))