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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-10-31 18:06:52 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-01-04 11:18:04 +0100
commitbb85f9eb73d0b4d50a4d12246be6495b8cd8477f (patch)
tree3d756f260ae9c1f44e0e85580b2d85ce4087d875 /src/northbridge
parent42d55e0caf9999be461ef5c5029d11fb8f4c5593 (diff)
downloadcoreboot-bb85f9eb73d0b4d50a4d12246be6495b8cd8477f.tar.xz
Revert "AMD OemS3Save: refactor for Merlin Falcon"
This reverts commit d3deecdd9c5c0a8031f2ea9d6c90e0997f123d93. Do not mix open-source AGESA and binary PI trees. Once you have working S3 support for binaryPI platforms, add the adapted oem_s3.c file as northbridge/amd/pi/oem_s3.c instead. Change-Id: I7c981d0023a5c0225e046f9c0104acfa07436b79 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/12282 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/agesawrapper.h2
-rw-r--r--src/northbridge/amd/agesa/oem_s3.c8
2 files changed, 2 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/agesawrapper.h b/src/northbridge/amd/agesa/agesawrapper.h
index d9938ac279..f5d52d64d3 100644
--- a/src/northbridge/amd/agesa/agesawrapper.h
+++ b/src/northbridge/amd/agesa/agesawrapper.h
@@ -70,6 +70,6 @@ extern const struct OEM_HOOK OemCustomize;
/* For suspend-to-ram support. */
AGESA_STATUS OemInitResume(AMD_RESUME_PARAMS *ResumeParams);
AGESA_STATUS OemS3LateRestore(AMD_S3LATE_PARAMS *S3LateParams);
-AGESA_STATUS OemS3Save(void *vS3SaveParams);
+AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams);
#endif /* _AGESAWRAPPER_H_ */
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c
index b71aff5d35..8cce0e7d55 100644
--- a/src/northbridge/amd/agesa/oem_s3.c
+++ b/src/northbridge/amd/agesa/oem_s3.c
@@ -113,15 +113,9 @@ static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
static u8 MTRRStorage[S3_DATA_MTRR_SIZE];
-AGESA_STATUS OemS3Save(void *vS3SaveParams)
+AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams)
{
-#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01)
- AMD_RTB_PARAMS *S3SaveParams = (AMD_RTB_PARAMS *)vS3SaveParams;
- S3_DATA_BLOCK *dataBlock = &S3SaveParams->S3DataBlock;
-#else
- AMD_S3SAVE_PARAMS *S3SaveParams = (AMD_S3SAVE_PARAMS *)vS3SaveParams;
AMD_S3_PARAMS *dataBlock = &S3SaveParams->S3DataBlock;
-#endif
u32 MTRRStorageSize = 0;
uintptr_t pos, size;