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authorJason Schildt <jschildt@gmail.com>2005-10-25 21:41:45 +0000
committerJason Schildt <jschildt@gmail.com>2005-10-25 21:41:45 +0000
commitcf6df2afb5becca923e398521ae0e2d155cf3aa2 (patch)
tree12e4a6175fd34073c4f6bcb47330ee6059f36f2b /src/northbridge
parent74cf993a54fd2d9a5730f415a60bdee0117028f2 (diff)
downloadcoreboot-cf6df2afb5becca923e398521ae0e2d155cf3aa2.tar.xz
- See Issue Tracker id-11.
- In addition: Kept K8_HT_FREQ_1G_SUPPORT to support older boards. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdk8/incoherent_ht.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index d4271efbda..bdb2676e39 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -1,11 +1,17 @@
/*
This should be done by Eric
2004.12 yhlu add multi ht chain dynamically support
+
*/
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/hypertransport_def.h>
+
+/* We can reduce the size of code generated by romcc by
+ * changing all of the fixed size types that live in registers
+ * into simple unsigned variables. (ie s/uint8_t/unsigned/g)
+ */
#ifndef K8_HT_FREQ_1G_SUPPORT
#define K8_HT_FREQ_1G_SUPPORT 0
#endif
@@ -130,21 +136,21 @@ static uint16_t ht_read_freq_cap(device_t dev, uint8_t pos)
/* AMD 8131 Errata 48 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
freq_cap &= ~(1 << HT_FREQ_800Mhz);
- return freq_cap;
}
/* AMD 8151 Errata 23 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
freq_cap &= ~(1 << HT_FREQ_800Mhz);
- return freq_cap;
}
/* AMD K8 Unsupported 1Ghz? */
if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
- #if K8_HT_FREQ_1G_SUPPORT == 1
- if (is_cpu_pre_e0()) // CK804 support 1G?
- #endif
- freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#if K8_HT_FREQ_1G_SUPPORT == 1
+ /* Supported starting with E0 */
+ device_t dev_2 = PCI_DEV(0,0x18,2);
+ if(pci_read_config32(dev_2,0x9c) < 0x20f00)
+#endif
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
}
return freq_cap;
@@ -199,8 +205,10 @@ static int ht_optimize_link(
/* See if I am changing the link freqency */
old_freq = pci_read_config8(dev1, pos1 + LINK_FREQ(offs1));
+ old_freq &= 0x0f;
needs_reset |= old_freq != freq;
old_freq = pci_read_config8(dev2, pos2 + LINK_FREQ(offs2));
+ old_freq &= 0x0f;
needs_reset |= old_freq != freq;
/* Set the Calulcated link frequency */