summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorPatrick Georgi <patrick.georgi@secunet.com>2012-11-20 11:53:47 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-27 23:51:52 +0100
commite135ac5a7ea69b6edcb89345019212f5de412b1e (patch)
tree408611a9f2846867f9731af53b1f08dd32eb6851 /src/northbridge
parentbdc1816b2379bdf569ac6746172bba41e1307917 (diff)
downloadcoreboot-e135ac5a7ea69b6edcb89345019212f5de412b1e.tar.xz
Remove AMD special case for LAPIC based udelay()
- Optionally override FSB clock detection in generic LAPIC code with constant value. - Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz - compile LAPIC code for romstage, too - Remove #include ".../apic_timer.c" in AMD based mainboards - Remove custom udelay implementation from intel northbridges' romstages Future work: - remove the compile time special case (requires some cpuid based switching) - drop northbridge udelay implementations (i945, i5000) if not required anymore (eg. can SMM use the LAPIC timer?) Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1618 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i5000/Makefile.inc2
-rw-r--r--src/northbridge/intel/i945/Makefile.inc1
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc1
3 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/i5000/Makefile.inc b/src/northbridge/intel/i5000/Makefile.inc
index e3ab0bbf10..03d86912c8 100644
--- a/src/northbridge/intel/i5000/Makefile.inc
+++ b/src/northbridge/intel/i5000/Makefile.inc
@@ -18,5 +18,5 @@
#
ramstage-y += northbridge.c
-romstage-y += raminit.c udelay.c
+romstage-y += raminit.c
cpu_incs += src/northbridge/intel/i5000/halt_second_bsp.S
diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc
index 89b0308cb8..491225e43e 100644
--- a/src/northbridge/intel/i945/Makefile.inc
+++ b/src/northbridge/intel/i945/Makefile.inc
@@ -21,7 +21,6 @@ ramstage-y += northbridge.c
ramstage-y += gma.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
-romstage-y += udelay.c
romstage-y += raminit.c
romstage-y += early_init.c
romstage-y += errata.c
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index bef3da535d..95d66cebca 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -23,7 +23,6 @@ ramstage-y += gma.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
ramstage-y += mrccache.c
-romstage-y += udelay.c
romstage-y += raminit.c
romstage-y += mrccache.c
romstage-y += early_init.c