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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-04 15:23:03 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-20 07:05:38 +0100
commite40beb1f79a68860338ef3d960ab794be231ff7c (patch)
treef461a8c8e06391807831025561da7a4c51d8fcab /src/northbridge
parent26c664759b53cca1de4bbb4c517fc65f4ca079c4 (diff)
downloadcoreboot-e40beb1f79a68860338ef3d960ab794be231ff7c.tar.xz
AMD fam10: Move the test for connected HyperTransport link
Change-Id: I9a24f9897115ce37ee11ca41c8b74142c95fc534 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8350 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c32
1 files changed, 20 insertions, 12 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 275c79cdf2..f2b18d003b 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -140,13 +140,29 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn)
}
+static bool is_non_coherent_link(struct device *dev, struct bus *link)
+{
+ u32 link_type;
+ do {
+ link_type = pci_read_config32(dev, link->cap + 0x18);
+ } while (link_type & ConnectionPending);
+
+ if (!(link_type & LinkConnected))
+ return false;
+
+ do {
+ link_type = pci_read_config32(dev, link->cap + 0x18);
+ } while (!(link_type & InitComplete));
+
+ return !!(link_type & NonCoherent);
+}
+
static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_sblink,
u32 max)
{
// I want to put sb chain in bus 0 can I?
- u32 link_type;
int i;
u32 ht_c_index;
u32 ht_unitid_base[4]; // here assume only 4 HT device on chain
@@ -171,19 +187,11 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
devx = dev;
}
+ /* Check for connected link. */
link->cap = 0x80 + ((link->link_num & 3) * 0x20);
- do {
- link_type = pci_read_config32(devx, link->cap + 0x18);
- } while(link_type & ConnectionPending);
- if (!(link_type & LinkConnected)) {
- return max;
- }
- do {
- link_type = pci_read_config32(devx, link->cap + 0x18);
- } while(!(link_type & InitComplete));
- if (!(link_type & NonCoherent)) {
+ if (!is_non_coherent_link(devx, link))
return max;
- }
+
/* See if there is an available configuration space mapping
* register in function 1.
*/