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authorFelix Held <felix-coreboot@felixheld.de>2018-07-30 17:56:52 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-08-01 13:23:02 +0000
commitf9b826ac372f718cc0b046a5ccfb52abebf39eae (patch)
tree09d6c1821557e86ef79ff95bf615d2e81e0cece0 /src/northbridge
parentb802c0772e95e6d4fb798456c2dcb7a3d7e72e9d (diff)
downloadcoreboot-f9b826ac372f718cc0b046a5ccfb52abebf39eae.tar.xz
sandybridge/raminit_common: use FOR_ALL_CHANNELS macro
Change-Id: I01bd69605760e8a03787dcfa3da9f47576e3144a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/27733 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 6639fd9a00..4de83fb577 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -3083,8 +3083,8 @@ void final_registers(ramctr_timing * ctrl)
MCHBAR32(0x4cd4) = 0x00000046;
- MCHBAR32_AND_OR(0x400c, 0xFFFFCFFF, 0x1000);
- MCHBAR32_AND_OR(0x440c, 0xFFFFCFFF, 0x1000);
+ FOR_ALL_CHANNELS
+ MCHBAR32_AND_OR(0x400c + 0x400 * channel, 0xFFFFCFFF, 0x1000);
if (is_mobile)
/* APD - DLL Off, 64 DCLKs until idle, decision per rank */
@@ -3093,8 +3093,9 @@ void final_registers(ramctr_timing * ctrl)
/* APD - PPD, 64 DCLKs until idle, decision per rank */
MCHBAR32(PM_PDWN_Config) = 0x00000340;
- MCHBAR32(0x4380) = 0x00000aaa; // OK
- MCHBAR32(0x4780) = 0x00000aaa; // OK
+ FOR_ALL_CHANNELS
+ MCHBAR32(0x4380 + 0x400 * channel) = 0x00000aaa;
+
MCHBAR32(0x4f88) = 0x5f7003ff; // OK
MCHBAR32(0x5064) = 0x00073000 | ctrl->reg_5064b0; // OK
@@ -3120,8 +3121,9 @@ void final_registers(ramctr_timing * ctrl)
MCHBAR32(0x5880) = 0xca9171e5;
MCHBAR32_AND_OR(0x5888, ~0xffffff, 0xe4d5d0);
MCHBAR32_AND(0x58a8, ~0x1f);
- MCHBAR32_AND_OR(0x4294, ~0x30000, 1 << 16);
- MCHBAR32_AND_OR(0x4694, ~0x30000, 1 << 16);
+
+ FOR_ALL_CHANNELS
+ MCHBAR32_AND_OR(0x4294 + 0x400 * channel, ~0x30000, 1 << 16);
MCHBAR32(0x5030) |= 1;
MCHBAR32(0x5030) |= 0x80;