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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-03-27 22:49:18 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-01 22:53:55 +0200
commit22564088c7ac48cfe03a61451d8f9d4b08dbe8b4 (patch)
treecaaa569df5429ab92d88b42ca3d1781974eb5194 /src/northbridge
parent3e91cffd894336c7ec802f0fc49e25e2a3b4efc6 (diff)
downloadcoreboot-22564088c7ac48cfe03a61451d8f9d4b08dbe8b4.tar.xz
mainboards/amdfam10: Copy DIMM information to cbmem after romstage
src/northbridge/amd/amdfam10: Add amdmct_cbmem_store_info() function. Change-Id: I07376e276e3e9e3247d2576a09e58780d32a3a76 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/9138 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/raminit_amdmct.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 02dc956306..6a71cd5508 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -204,3 +204,43 @@ static void raminit_amdmct(struct sys_info *sysinfo)
printk(BIOS_DEBUG, "raminit_amdmct end:\n");
}
+
+static void amdmct_cbmem_store_info(struct sys_info *sysinfo)
+{
+ /* Save memory info structures for use in ramstage */
+ size_t i;
+ struct MCTStatStruc *pMCTstat = &(sysinfo->MCTstat);
+ struct DCTStatStruc *pDCTstatA = NULL;
+
+ if (pMCTstat && sysinfo->DCTstatA) {
+ /* Allocate memory */
+ struct amdmct_memory_info* mem_info;
+ mem_info = cbmem_add(CBMEM_ID_AMDMCT_MEMINFO, sizeof(struct amdmct_memory_info));
+ if (!mem_info)
+ return;
+
+ printk(BIOS_DEBUG, "%s: Storing AMDMCT configuration in CBMEM\n", __func__);
+
+ /* Initialize memory */
+ memset(mem_info, 0, sizeof(struct amdmct_memory_info));
+
+ /* Copy data */
+ memcpy(&mem_info->mct_stat, &(sysinfo->MCTstat), sizeof(struct MCTStatStruc));
+ for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
+ pDCTstatA = sysinfo->DCTstatA + i;
+ memcpy(&mem_info->dct_stat[i], pDCTstatA, sizeof(struct DCTStatStruc));
+ }
+ mem_info->ecc_enabled = mctGet_NVbits(NV_ECC_CAP);
+ mem_info->ecc_scrub_rate = mctGet_NVbits(NV_DramBKScrub);
+
+ /* Zero out invalid/unused pointers */
+#if IS_ENABLED(CONFIG_DIMM_DDR3)
+
+ for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
+ mem_info->dct_stat[i].C_MCTPtr = NULL;
+ mem_info->dct_stat[i].C_DCTPtr[0] = NULL;
+ mem_info->dct_stat[i].C_DCTPtr[1] = NULL;
+ }
+#endif
+ }
+}