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authorAngel Pons <th3fanbus@gmail.com>2020-09-17 22:35:19 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-21 08:14:00 +0000
commit3da27ab681f1a754c553d325b20be32284a1b8d9 (patch)
tree559377241d688acbc051e12339b3d7ffc9c876d5 /src/northbridge
parent035096c6f0c8ebda3176ed41f341aa436c2b3009 (diff)
downloadcoreboot-3da27ab681f1a754c553d325b20be32284a1b8d9.tar.xz
nb/intel/sandybridge: Check ME status only once
The pre-RAM CBMEM console is tiny. Do not fill it with largely redundant information, when we could instead store more useful raminit debug logs. Change-Id: I3a93fdeb67b0557e876f78b12241b70933ad324d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45499 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 9ad8fd47ef..319fea3a5d 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -453,7 +453,6 @@ static void init_dram_ddr3(int s3resume, const u32 cpuid)
/* Zone config */
dram_zones(&ctrl, 0);
- intel_early_me_status();
intel_early_me_init_done(ME_INIT_STATUS_SUCCESS);
intel_early_me_status();