diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-15 13:06:53 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:10:50 +0000 |
| commit | 4c76d25717048c71533c67cec21085dfc27538f9 (patch) | |
| tree | 0be61949d7216f25a246fc039b5d000d0e540807 /src/northbridge | |
| parent | c39d11cec0505e95e2bcf9e88145f1e35939a4c2 (diff) | |
| download | coreboot-4c76d25717048c71533c67cec21085dfc27538f9.tar.xz | |
nb/intel/sandybridge: Drop `precharge` function
This is a copy of `find_predefined_pattern` without any effect.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: Ieb72066ca25b40b6e60f04e6c4097a0ccc2a56b3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 49 |
1 files changed, 2 insertions, 47 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 0939fe6348..c41b0f1392 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1651,51 +1651,6 @@ static void fill_pattern1(ramctr_timing *ctrl, int channel) program_wdb_pattern_length(channel, 16); } -static void precharge(ramctr_timing *ctrl) -{ - int channel, slotrank, lane; - - FOR_ALL_POPULATED_CHANNELS { - FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { - ctrl->timings[channel][slotrank].lanes[lane].falling = 16; - ctrl->timings[channel][slotrank].lanes[lane].rising = 16; - } - - program_timings(ctrl, channel); - - FOR_ALL_POPULATED_RANKS { - wait_for_iosav(channel); - - iosav_write_read_mpr_sequence( - channel, slotrank, ctrl->tMOD, 3, 4, 1, ctrl->CAS + 8); - - /* Execute command queue */ - iosav_run_once(channel); - - wait_for_iosav(channel); - } - - FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { - ctrl->timings[channel][slotrank].lanes[lane].falling = 48; - ctrl->timings[channel][slotrank].lanes[lane].rising = 48; - } - - program_timings(ctrl, channel); - - FOR_ALL_POPULATED_RANKS { - wait_for_iosav(channel); - - iosav_write_read_mpr_sequence( - channel, slotrank, ctrl->tMOD, 3, 4, 1, ctrl->CAS + 8); - - /* Execute command queue */ - iosav_run_once(channel); - - wait_for_iosav(channel); - } - } -} - static int write_level_rank(ramctr_timing *ctrl, int channel, int slotrank) { int timB; @@ -2010,12 +1965,12 @@ int write_training(ramctr_timing *ctrl) FOR_ALL_POPULATED_CHANNELS MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27); + printram("CPE\n"); + err = jedec_write_leveling(ctrl); if (err) return err; - printram("CPE\n"); - precharge(ctrl); printram("CPF\n"); FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { |