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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-28 13:43:13 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 13:01:29 +0000 |
| commit | afb3d7e7ecccdc1fbde66fe08252bd97de4df35d (patch) | |
| tree | da6ba2eaf03d9afd52e1fc95d2b540ec230246be /src/northbridge | |
| parent | 4774012515db737c3aada7ced093851346aece4d (diff) | |
| download | coreboot-afb3d7e7ecccdc1fbde66fe08252bd97de4df35d.tar.xz | |
device/dram/ddr3: Get rid of useless typedefs
These typedefs are not necessary. Remove them, and rename some elements
to avoid any confusion with other DRAM generations, such as DDR4.
Change-Id: Ibe40f33372358262c540e371f7866b06a4ac842a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51895
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/raminit.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 47cd7dee50..92a0b720e2 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -174,7 +174,7 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) spd_slot = 2 * channel + slot; printk(BIOS_DEBUG, "SPD probe channel%d, slot%d\n", channel, slot); - dimm_attr *const dimm = &ctrl->info.dimm[channel][slot]; + struct dimm_attr_ddr3_st *const dimm = &ctrl->info.dimm[channel][slot]; /* Search for XMP profile */ spd_xmp_decode_ddr3(dimm, spd[spd_slot], diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index d6a8aa550a..687386d0f7 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -66,7 +66,7 @@ void dram_find_common_params(ramctr_timing *ctrl) FOR_ALL_CHANNELS for (slot = 0; slot < 2; slot++) { - const dimm_attr *dimm = &dimms->dimm[channel][slot]; + const struct dimm_attr_ddr3_st *dimm = &dimms->dimm[channel][slot]; if (dimm->dram_type != SPD_MEMORY_TYPE_SDRAM_DDR3) continue; @@ -245,7 +245,7 @@ void dram_dimm_mapping(ramctr_timing *ctrl) dimm_info *info = &ctrl->info; FOR_ALL_CHANNELS { - dimm_attr *dimmA, *dimmB; + struct dimm_attr_ddr3_st *dimmA, *dimmB; u32 reg = 0; if (info->dimm[channel][0].size_mb >= info->dimm[channel][1].size_mb) { diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h index b93902aa38..1622259b66 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.h +++ b/src/northbridge/intel/sandybridge/raminit_common.h @@ -322,7 +322,7 @@ typedef struct odtmap_st { /* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */ typedef struct dimm_info_st { - dimm_attr dimm[NUM_CHANNELS][NUM_SLOTS]; + struct dimm_attr_ddr3_st dimm[NUM_CHANNELS][NUM_SLOTS]; } dimm_info; /* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */ diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 8ff0ffc19a..c780071678 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -351,7 +351,7 @@ static void workaround_stacked_mode(struct sysinfo *s) static int ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd, struct abs_timings *saved_timings, struct sysinfo *s) { - struct dimm_attr_st decoded_dimm; + struct dimm_attr_ddr3_st decoded_dimm; if (spd_decode_ddr3(&decoded_dimm, raw_spd) != SPD_STATUS_OK) return CB_ERR; |