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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-04-30 15:19:24 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-05 11:47:15 +0000 |
| commit | c8116f6ea062dc60c6efd6a73510e69eb9b84c2d (patch) | |
| tree | ad669b7f5082d9e49a0b158bae8a57abc9772b19 /src/northbridge | |
| parent | b761903b8bbcf33b1f159b7899e0970f2eac6498 (diff) | |
| download | coreboot-c8116f6ea062dc60c6efd6a73510e69eb9b84c2d.tar.xz | |
nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE
Now the bootblock is not limited to 64K so integrating vboot into the
bootblock reduces the binary size.
Change-Id: Ic92ecf8068f327a893d20924685ce571752d379f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52787
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/gm45/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/Kconfig | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/ironlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 1 |
5 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 06883e4da1..cd3e27c54e 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -16,7 +16,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE config CBFS_SIZE hex diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index e3f9aec266..61c201a1cb 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -14,7 +14,6 @@ config HASWELL_VBOOT_IN_BOOTBLOCK bool "Start verstage in bootblock" default y select VBOOT_STARTS_IN_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE help Haswell can either start verstage in a separate stage right after the bootblock has run or it can start it diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 484b69482e..2af44245e6 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -17,8 +17,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE - config NORTHBRIDGE_INTEL_SUBTYPE_I945GC def_bool n config NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig index 0d58704a18..4fe5dd1737 100644 --- a/src/northbridge/intel/ironlake/Kconfig +++ b/src/northbridge/intel/ironlake/Kconfig @@ -14,7 +14,6 @@ if NORTHBRIDGE_INTEL_IRONLAKE config VBOOT select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE # CPU is reset without platform/TPM during romstage select TPM_STARTUP_IGNORE_POSTINIT diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 215560f84b..501ca9f6b9 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -21,7 +21,6 @@ config SANDYBRIDGE_VBOOT_IN_BOOTBLOCK bool "Start verstage in bootblock" default y select VBOOT_STARTS_IN_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE help Sandy Bridge can either start verstage in a separate stage right after the bootblock has run or it can start it |