diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-15 11:25:14 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-17 15:07:57 +0000 |
commit | f240a3269e8ba81c500885250be2214fdb90707d (patch) | |
tree | 1217f040d880e324261feece990d5d305ce3d630 /src/northbridge | |
parent | 6d5fcf4fbe90bb869d4ac1057ce6f23cd4b03567 (diff) | |
download | coreboot-f240a3269e8ba81c500885250be2214fdb90707d.tar.xz |
nb/intel/nehalem/vboot: Ignore invalid POSTINIT on TPM startup
During the raminit the CPU gets reset but the platform does not. To
deal with TPM init failure (a TPM can only be started up once) ignore
the invalid POSTINIT return code.
Change-Id: Ib15e796914d3e6d5f01b35fa46b3ead40f56122b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36055
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/nehalem/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index a88d4c9024..7b56841336 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -29,6 +29,8 @@ config VBOOT select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SEPARATE_VERSTAGE + # CPU is reset without platform/TPM during romstage + select TPM_STARTUP_IGNORE_POSTINIT config MMCONF_BUS_NUMBER int |