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authorElyes HAOUAS <ehaouas@noos.fr>2016-10-31 10:49:33 +0100
committerMartin Roth <martinroth@google.com>2017-02-22 00:27:03 +0100
commit39bfc6cb136e641955ca5db477be43715ac72454 (patch)
tree114b2c9c7e634081d2601036398a55702bdf6a5e /src/northbridge
parenta04ceaa13da0ebaa0456fcebb8dc319a4a863678 (diff)
downloadcoreboot-39bfc6cb136e641955ca5db477be43715ac72454.tar.xz
nb/i945/raminit.c: Fix dll timings on 945GC
Values based on vendor bios. TESTED on ga-945gcm-s2l with 667MHz ddr2. Change-Id: I2160f0ac73776b20e2cc1ff5bf77ebe98d2c2672 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/17197 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/raminit.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index db49d0a42c..8fe5f249df 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -1236,10 +1236,18 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
MCHBAR16(DQSMT) |= (1 << 13) | (0xc << 0);
/* We drive both channels with the same speed */
- switch (sysinfo->memory_frequency) {
- case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
- case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
- case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
+ if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
+ switch (sysinfo->memory_frequency) {
+ case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
+ case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
+ case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
+ }
+ } else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
+ switch (sysinfo->memory_frequency) {
+ case 400: chan0dll = 0x33333333; chan1dll = 0x33333333; break; /* 400MHz */
+ case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */
+ case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */
+ }
}
for (i = 0; i < 4; i++) {
@@ -1247,6 +1255,10 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
MCHBAR32(C0R0B00DQST + (i * 0x10) + 4) = chan0dll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 0) = chan1dll;
MCHBAR32(C1R0B00DQST + (i * 0x10) + 4) = chan1dll;
+ if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
+ MCHBAR8(C0R0B00DQST + (i * 0x10) + 8) = chan0dll & 0xff;
+ MCHBAR8(C1R0B00DQST + (i * 0x10) + 8) = chan1dll & 0xff;
+ }
}
}